Datasheet TPD7110F (Toshiba) - 10
| Hersteller | Toshiba |
| Seiten / Seite | 20 / 10 — Output voltage under reverse. connection. Supply current under reverse. … |
| Dateiformat / Größe | PDF / 723 Kb |
| Dokumentensprache | Englisch |
Output voltage under reverse. connection. Supply current under reverse. Switching time. 11. Test circuits
Modelllinie für dieses Datenblatt
Textversion des Dokuments
TPD7110F Refer to test circuit 5
Output voltage under reverse
V V - - 0.5 V
connection
GSREV DD = -3 V to -32 V, Tj = 25 °C Refer to test circuit 5
Supply current under reverse
I V - - 100 μA
connection
REV DD = -3 V to -32 V, Tj = 25 °C tON1 - 1.6 2.8 ms Refer to test circuit 6
Switching time
tON2 - 3.2 5.8 ms Tj = 25 °C tOFF1 - 3.9 5.0 μs
11. Test circuits A
VDD V 1 IN IN VDD 8 2 N.C. 10 Ω GATE 7 22000 pF 3 GND SOURCE 6 4 SUB SENSE 5
Fig. 11.1 Test circuit 1
V 1 IN IN VDD 8 2 N.C. 10 Ω GATE 7 22000 pF VDD 3 GND SOURCE 6
V
4 SUB SENSE 5
Fig. 11.2 Test circuit 2
©20 25 10 2025-09-04 Toshiba Electronic Devices & Storage Corporation Rev. 1.0
Output voltage under reverse
V V - - 0.5 V
connection
GSREV DD = -3 V to -32 V, Tj = 25 °C Refer to test circuit 5
Supply current under reverse
I V - - 100 μA
connection
REV DD = -3 V to -32 V, Tj = 25 °C tON1 - 1.6 2.8 ms Refer to test circuit 6
Switching time
tON2 - 3.2 5.8 ms Tj = 25 °C tOFF1 - 3.9 5.0 μs
11. Test circuits A
VDD V 1 IN IN VDD 8 2 N.C. 10 Ω GATE 7 22000 pF 3 GND SOURCE 6 4 SUB SENSE 5
Fig. 11.1 Test circuit 1
V 1 IN IN VDD 8 2 N.C. 10 Ω GATE 7 22000 pF VDD 3 GND SOURCE 6
V
4 SUB SENSE 5
Fig. 11.2 Test circuit 2
©20 25 10 2025-09-04 Toshiba Electronic Devices & Storage Corporation Rev. 1.0