Datasheet TPD7110F (Toshiba) - 2
| Hersteller | Toshiba |
| Seiten / Seite | 20 / 2 — 4. Block Diagram. Fig. 4.1 Block Diagram. 5. Pin Assignments Top view. … |
| Dateiformat / Größe | PDF / 723 Kb |
| Dokumentensprache | Englisch |
4. Block Diagram. Fig. 4.1 Block Diagram. 5. Pin Assignments Top view. Fig. 5.1 Pin Assignments (top view)
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TPD7110F
4. Block Diagram
BATV GATE SOURCE SENSE AD O L Charge pump VDD OV/UV detection VRC Reg. Logic IN MCU Reverse detection GND SUB
Fig. 4.1 Block Diagram
Note : The block diagram is simplified and intended for illustration only. The surrounding connections are for reference only.
5. Pin Assignments Top view
IN 1 8 VDD N.C. 2 7 GATE GND 3 6 SOURCE SUB 4 5 SENSE
Fig. 5.1 Pin Assignments (top view)
©202 5 2 2025-09-04 Toshiba Electronic Devices & Storage Corporation Rev. 1.0
4. Block Diagram
BATV GATE SOURCE SENSE AD O L Charge pump VDD OV/UV detection VRC Reg. Logic IN MCU Reverse detection GND SUB
Fig. 4.1 Block Diagram
Note : The block diagram is simplified and intended for illustration only. The surrounding connections are for reference only.
5. Pin Assignments Top view
IN 1 8 VDD N.C. 2 7 GATE GND 3 6 SOURCE SUB 4 5 SENSE
Fig. 5.1 Pin Assignments (top view)
©202 5 2 2025-09-04 Toshiba Electronic Devices & Storage Corporation Rev. 1.0