Datasheet VIA2000SD (Vishay) - 9
| Hersteller | Vishay |
| Beschreibung | High Reliability Reinforced Isolated Amplifier in SOP-8 (300 mil) Package |
| Seiten / Seite | 12 / 9 — VIA2000SD. Analog Input. Analog Output |
| Dateiformat / Größe | PDF / 197 Kb |
| Dokumentensprache | Englisch |
VIA2000SD. Analog Input. Analog Output
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VIA2000SD
www.vishay.com Vishay Semiconductors
Analog Input
Below mentioned are the restrictions on the analog input signal (VIN). 1. If the input voltage exceeds the range GND1 - 6 V to VDD1 + 0.5 V, the input current must be limited to 10 mA because the device input electrostatic discharge (ESD) diodes turn on 2. The linearity and noise performance of the device are ensured only when the analog input voltage remains within the specified linear full-scale range (FSR)
Analog Output
For linear input range, VIA2000SD provides an analog differential output which has a fixed gain of 1. If a full-scale input signal is applied to the VIA2000SD (VIN ≥ VClipping), the analog output will be clipped. In addition, VIA2000SD integrates some diagnostic measures and offers a fail-safe output to simplify system-level design. The fail safe output is a negative differential output voltage that is activated in the conditions mentioned below. Please note that the fail safe output does not occur during normal operation. 1. When the undervoltage of VDD1 is detected (VDD1 < VDD1uv) 2. When SHTDN signal is activated (pulled high) Axis Title Axis Title 3.0 10000 3.0 10000 OUTN 2.5 2.5 OUTP 2.0 1000 2.0 1000 V V FAILSAFE ne ne CLIPPING ne ne 1.5 1.5 1st line 1st li 2nd li 1st line 1st li 2nd li - Output Voltage (V) 1.0 100 - Output Voltage (V) 1.0 100 Fail Fail V V 0.5 0.5 OUTP OUTN 0 10 0 10 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 A.U. A.U. Fig. 16 - Typical Fail-Safe Output When Clipping Output Rev. 1.1, 02-Apr-2025
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Document Number: 80902 For technical questions, contact: optocoupleranswers@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
www.vishay.com Vishay Semiconductors
Analog Input
Below mentioned are the restrictions on the analog input signal (VIN). 1. If the input voltage exceeds the range GND1 - 6 V to VDD1 + 0.5 V, the input current must be limited to 10 mA because the device input electrostatic discharge (ESD) diodes turn on 2. The linearity and noise performance of the device are ensured only when the analog input voltage remains within the specified linear full-scale range (FSR)
Analog Output
For linear input range, VIA2000SD provides an analog differential output which has a fixed gain of 1. If a full-scale input signal is applied to the VIA2000SD (VIN ≥ VClipping), the analog output will be clipped. In addition, VIA2000SD integrates some diagnostic measures and offers a fail-safe output to simplify system-level design. The fail safe output is a negative differential output voltage that is activated in the conditions mentioned below. Please note that the fail safe output does not occur during normal operation. 1. When the undervoltage of VDD1 is detected (VDD1 < VDD1uv) 2. When SHTDN signal is activated (pulled high) Axis Title Axis Title 3.0 10000 3.0 10000 OUTN 2.5 2.5 OUTP 2.0 1000 2.0 1000 V V FAILSAFE ne ne CLIPPING ne ne 1.5 1.5 1st line 1st li 2nd li 1st line 1st li 2nd li - Output Voltage (V) 1.0 100 - Output Voltage (V) 1.0 100 Fail Fail V V 0.5 0.5 OUTP OUTN 0 10 0 10 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 A.U. A.U. Fig. 16 - Typical Fail-Safe Output When Clipping Output Rev. 1.1, 02-Apr-2025
9
Document Number: 80902 For technical questions, contact: optocoupleranswers@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000