Datasheet 1EDBx275F (Infineon) - 5

HerstellerInfineon
BeschreibungSingle-channel isolated gate-driver IC in 150 mil DSO-8 package
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EiceDRIVER™ 1EDBx275F Single-channel isolated gate-driver ICs in 150 mil DSO package Functional description

EiceDRIVER™ 1EDBx275F Single-channel isolated gate-driver ICs in 150 mil DSO package Functional description

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EiceDRIVER™ 1EDBx275F Single-channel isolated gate-driver ICs in 150 mil DSO package Functional description 2 Functional description 2.1 Block diagram
A simplified functional block diagram for the EiceDRIVER™ 1EDBx275F is given in
Figure 3
. 1 UVLO UVLO 5 VDDO IN+ 2 6 OUT_SRC GNDI Logic TX RX Logic VDDI VDDO 7 OUT_SNK IN- 3 Active tion Clamp -to-output isola GNDI 4 Input 8 GNDO GNDI
Figure 3 Block diagram 2.2 Power supply and Undervoltage Lockout (UVLO)
Due to the isolation between input and output side, two power domains with independent power management are required. Undervoltage Lockout (UVLO) functions for both input and output supplies ensure a defined startup and robust functionality under all operating conditions.
2.2.1 Input supply voltage
The input die is powered via VDDI and supports a wide supply voltage range from 3 V to 15 V. A ceramic bypass capacitor must be placed between VDDI and GNDI in close proximity to the device; a minimum capacitance of 100 nF is recommended. Power consumption to some extent depends on switching frequency, as the input signal is converted into a train of repetitive current pulses to drive the coreless transformer. Due to the chosen robust encoding scheme the average repetition rate of these pulses and thus the average supply current depends on the switching frequency, fsw. However, for fsw < 500 kHz this effect is very small. The Undervoltage Lockout function for the input supply VDDI ensures that, as long as VDDI is below UVLO (e.g. in startup), no data is transferred to the output side and the gate driver output is held low (Safety Lock-down at startup). When VDDI exceeds the UVLO level, the PWM input signal is transferred to the output side. If the output side is ready (not in UVLO condition), the output reacts according to the logic input. Final Data Sheet 5 Rev. 2.1 2021-04-21 Document Outline Description Table of Contents 1 Pin configuration and description 2 Functional description 2.1 Block diagram 2.2 Power supply and Undervoltage Lockout (UVLO) 2.2.1 Input supply voltage 2.2.2 Output supply voltage 2.2.3 Input stage 2.3 Driver output 2.4 Output active clamping 2.5 CT communication and input to output data transmission 3 Electrical characteristics and parameters 3.1 Absolute maximum ratings 3.2 Thermal characteristics 3.3 Operating range 3.4 Electrical characteristics 3.5 Isolation specifications 4 Timing diagrams 5 Layout recommendation 6 Application notes 6.1 Driving 600 V CoolGaNTM 6.2 Driving 650 V CoolSiCTM 7 Typical characteristics 8 Package outline dimensions 8.1 Device numbers and markings 8.2 Package PG-DSO-8 Revision history