Datasheet AD5522 (Analog Devices) - 5

HerstellerAnalog Devices
BeschreibungQuad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs
Seiten / Seite64 / 5 — Data Sheet. AD5522. AGND. AVSS. AVDD. DVCC. DGND. CCOMP0. VREF. 16-BIT. …
RevisionF
Dateiformat / GrößePDF / 1.6 Mb
DokumentenspracheEnglisch

Data Sheet. AD5522. AGND. AVSS. AVDD. DVCC. DGND. CCOMP0. VREF. 16-BIT. CH0. EXTFOH0. X1 REG. CLH DAC. CLH. CFF0. X2 REG. SW3. M REG. REFGND. C REG. OFFSET DAC

Data Sheet AD5522 AGND AVSS AVDD DVCC DGND CCOMP0 VREF 16-BIT CH0 EXTFOH0 X1 REG CLH DAC CLH CFF0 X2 REG SW3 M REG REFGND C REG OFFSET DAC

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Data Sheet AD5522 AGND AVSS AVDD DVCC DGND CCOMP0 EN VREF 16-BIT 16 16 CH0 EXTFOH0 X1 REG CLH DAC CLH CFF0 X2 REG SW3 16 M REG REFGND ×2 16 C REG ×2 OFFSET DAC INTERNAL RANGE 16 FIN SELECT 16 ×6 SW1 (±5µA, ±20µA, ±200µA, ±2mA) 16 16-BIT X1 REG + 16 FIN DAC + M REG AGND FOH0 X2 REG FORCE C REG MEASVH AMPLIFIER SW5 ×6 (Hi-Z) RSENSE SW2 SW4 SW6 4kΩ 16 16 16-BIT X1 REG CLL DAC CLL EXTMEASIH0 16 X2 REG VMID TO M REG ×2 + 16 CENTER EXTERNAL C REG SW8 SW10 ×2 I RANGE RSENSE 2kΩ SW7 (CURRENTS + ×5 OR ×10 EXTMEASIL0 UP TO ±80mA) MEASOUT + MEASOUT0 MUX AND GAIN SW9 ×1/×0.2 SW12 TEMP 4kΩ SENSOR MEASURE AGND 16 CURRENT SW11 MEASVH0 ×6 IN-AMP 16 ×6 + 16 X1 REG SW16 16 16-BIT M REG CPH DAC X2 REG AGND SW13 DUT C REG + GUARD0 ×1 GUARD AMP DUTGND 16 CPH DUTGND 16 ×6 + SW14 ×6 GUARDIN0/ CPL 16-BIT 16 X1 REG 16 DUTGND0 CPL DAC M REG X2 REG + + MEASURE C REG VOLTAGE SW15 COMPARATOR IN-AMP CPOL0/SCLK 10kΩ AGND CPOH0/SDI EXTFOH1 CFF1 CCOMP1 FOH1 MEASOUT1 CH1 EXTMEASIH1 CPOL1/SYNC EXTMEASIL1 CPOH1/SDO MEASVH1 AGND GUARD1 GUARDIN1/DUTGND1 MUX SYS_SENSE MUX SYS_FORCE EXTFOH2 CFF2 CCOMP2 FOH2 MEASOUT2 CPOL2/CPO0 EXTMEASIH2 CPOH2/CPO1 CH2 EXTMEASIL2 AGND MEASVH2 GUARD2 GUARDIN2/DUTGND2 EN CCOMP3 EXTFOH3 16-BIT 16 16 X1 REG CLH DAC CLH X2 REG SW3 CFF3 16 M REG ×2 16 C REG ×2 OFFSET DAC CH3 INTERNAL RANGE 16 SELECT FIN 16 ×6 SW1 (±5µA, ±20µA, ±200µA, ±2mA) 16 16-BIT + X1 REG 16 FIN DAC + M REG X2 REG AGND FORCE FOH3 C REG AMPLIFIER MEASVH SW5 ×6 (Hi-Z) RSENSE SW2 SW6 4kΩ 16 16 16-BIT SW4 X1 REG CLL DAC CLL EXTMEASIH3 16 X2 REG VMID TO M REG ×2 + 16 CENTER EXTERNAL C REG SW10 SW8 ×2 I RANGE RSENSE 2kΩ SW7 (CURRENTS + x5 or x10 EXTMEASIL3 UP TO ±80mA) MEASOUT + MEASOUT3 MUX AND GAIN SW9 x1/x0.2 SW12 TEMP 4kΩ SENSOR MEASURE 16 AGND CURRENT SW11 MEASVH3 ×6 IN-AMP 16 ×6 + 16 X1 REG 16 16-BIT M REG CPH DAC X2 REG AGND SW13 C REG + GUARD3 DUT SW16 x1 GUARD AMP DUTGND 16 CPH 16 ×6 + ×6 SW14 CPL GUARDIN3/ 16-BIT 16 X1 REG 16 CPL DAC DUTGND3 M REG X2 REG + + MEASURE C REG VOLTAGE SW15 IN-AMP COMPARATOR 10kΩ AGND DUTGND 16-BIT TO ALL DAC TO 16 OUTPUT TEMP OFFSET MEASOUT SW15a TMPALM AMPLIFIERS SENSOR DAC MUX 16 SERIAL 10kΩ CLAMP AND
002
CGALM POWER-ON INTERFACE GUARD AGND ALARM RESET
06197-
RESET SDO SCLK SDI SYNC BUSY LOAD SPI/ CPOL3/ CPOH3/ LVDS CPO2 CPO3
Figure 2. Detailed Block Diagram Rev. F | Page 5 of 64 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications Timing Characteristics Circuit and Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Force Amplifier Comparators Clamps Current Range Selection High Current Ranges Measure Current Gains VMID Voltage Choosing Power Supply Rails Measure Output (MEASOUTx Pins) Device Under Test Ground (DUTGND) Guard Amplifier Compensation Capacitors System Force and Sense Switches Temperature Sensor DAC Levels Offset DAC Gain and Offset Registers Cached X2 Registers Gain and Offset Registers for the FIN DAC Gain and Offset Registers for the Comparator DACs Gain and Offset Registers for the Clamp DACs Reference Voltage (VREF) Reference Selection Reference Selection Example Calibration Reducing Zero-Scale Error Reducing Gain Error Calibration Example Additional Calibration System Level Calibration Circuit Operation Force Voltage (FV) Mode Force Current (FI) Mode Serial Interface SPI Interface LVDS Interface Serial Interface Write Mode RESETB Function BUSYB and LOADB Functions Register Update Rates Register Selection Readback Control, RD/WRB PMU Address Bits: PMU3, PMU2, PMU1, PMU0 NOP (No Operation) Reserved Commands Write System Control Register Write PMU Register Write DAC Register DAC Addressing Read Registers Readback of System Control Register Readback of PMU Register Readback of Comparator Status Register Readback of Alarm Status Register Readback of DAC Register Applications Information Power-On Default Setting Up the Device on Power-On Changing Modes Required External Components Power Supply Decoupling Power Supply Sequencing Typical Application for the AD5522 Outline Dimensions Ordering Guide