Datasheet Texas Instruments SN74HC112NE4 — Datenblatt

HerstellerTexas Instruments
SerieSN74HC112
ArtikelnummerSN74HC112NE4
Datasheet Texas Instruments SN74HC112NE4

Dual JK Negative-Edge-Triggered Flip-Flops mit klarem und voreingestelltem 16-PDIP -40 bis 85

Datenblätter

SN54HC112, SN74HC112 datasheet
PDF, 598 Kb, Revision: F, Datei veröffentlicht: Sep 26, 2003
Auszug aus dem Dokument

Anwendungshinweise

  • HCMOS Design Considerations (Rev. A)
    PDF, 207 Kb, Revision: A, Datei veröffentlicht: Sep 9, 2002
    This document describes a potential problem designers may encounter when using high-speed CMOS (HC) logic devices. There also is a broad range of CMOS-system to non-CMOS-system interfaces that need to be considered. The design engineer inevitably encounters these interfaces. Key considerations for handling these interfaces are also discussed in this book.

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop