Datasheet TB67S531FTG (Toshiba) - 3

TB67S531FTG Note: All the grounding wires of TB67S531FTG should run on the solder mask on the PCB and be externally terminated at only one point. Also, a grounding method should be considered for efficient heat dissipation. Careful attention should be paid to the layout of the output, VM and GND traces, to avoid short circuits across output pins or to the power supply or ground. If such a short circuit occurs, the device may be permanently damaged. Also, the utmost care should be taken for pattern designing and implementation of the device since it has power supply pins (VM, OUTA1, OUTA2, OUTB1, OUTB2, AGND, PGND, RSGND_A, and RSGND_B) through which a particularly large current may run. If these pins are wired incorrectly, an operation error may occur or the device may be destroyed. The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current running through the IC that is larger than the specified current. Careful attention should be paid to design patterns and mountings. ©2026 3 2026-04-07 Toshiba Electronic Devices & Storage Corporation Rev. 1.0.A Document Outline 1. Description 2. Features 3. Block Diagram 4. Pin Assignments 5. Pin Description 5.1. Pin Function Description TB67S531FTG 5.2. Input and Output Equivalent Circuit 6. Functional Description: TB67S531FTG 6.1. SLEEP_X function 6.2. Phase input control mode 6.2.1. Functions of IN_A1, IN_A2, IN_B1, IN_B2, PHASE_A, PHASE_B 6.2.2. Sequence by each drive mode in phase input control mode 6.2.2.1. Full-step resolution 6.2.2.2. Half-step resolution 6.2.2.3. Quarter-step resolution 6.3. Torque function 6.4. Selectable Mixed Decay Function 6.4.1. Mixed Decay Waveform (Current Waveform) 6.4.2. Each Time of Constant Current PWM Operation 6.4.3. Mixed Decay Current Waveform 6.4.3.1. When the set current value is increased 6.4.3.2. When the Charge period is more than 1 fCHOP cycle 6.4.3.3. When the set current value is decreased 6.5. ADMD (Advanced Dynamic Mixed Decay) Constant Current Control 6.6. ADMD Current Waveform 6.6.1. When the next current value is increased 6.6.2. When Charge period ≥ 1 fCHOP cycle 6.6.3. When the next current value is decreased 6.6.4. Fast period > 1 fCHOP cycle (The motor current does not reach the ADMD threshold during 1 fCHOP cycle.) 6.7. LO (Error detection flag output) function 6.8. Output Transistor Function mode (Advanced Dynamic Mixed Decay) 6.9. Set current value (IOUT) 6.10. Chopping frequency (fCHOP) 6.11. Power consumption of the IC 6.11.1. Power consumption of the power transistor 6.11.2. Power consumption of logic and IM systems 6.11.3. Power consumption 6.12. Detection Function 6.12.1. Thermal shutdown detection (This function is a latch type that maintains the operation at the time of detection.) 6.12.1.1. When over temperature is detected: 6.12.2. Over-current detection (This function is a latch type that maintains the operation at the time of detection.) 6.12.2.1. When over-current is detected in the lower DMOS of H-bridge by the short-circuiting to the power supply 6.12.2.2. When over-current is detected in the upper DMOS of H-bridge by the short-circuiting to the ground: 7. Absolute Maximum Ratings (Ta = 25 C) 8. Operating Ranges (Ta = -40 to 85 C) 9. Electrical Characteristics 9.1. Electrical Characteristics 1 (Ta = 25 C, VM = 24 V, unless otherwise specified) 9.2. Electrical Characteristics 2 (Ta = 25 C, VM = 24 V, unless otherwise specified) 9.3. AC Electrical Characteristics (Ta = 25 C, VM = 24 V) 9.3.1. AC Electrical Characteristics Timing Chart 10. Application Circuit Example 11. Package Information 11.1. Package Dimensions 12. IC Usage Considerations 12.1. Notes on Handling of ICs 12.2. Points to Remember on Handling of Ics RESTRICTIONS ON PRODUCT USE