Datasheet EPC23110 (Efficient Power Conversion) - 6

eGaN® IC DATASHEET
EPC23110
Dynamic Characteristics Parameter Definition Figure 3: Logic Input to Output Switching Node Timing Diagram (current exiting from SW node)
5 V
HS
50%
IN LS
5 V
IN
50% t_delay ~48 V HS_off ~700 mV
SW
~0 V ~700 mV t_delayLS_off t_delayHS_on t_delayLS_on
Output Capacitance vs. Drain-to-Source Voltage Figure 4a: C EPC23104 Typical C OSS_HSFET of high-side Power GaN FET Figure 4b: C EPC23104 Typical C OSS_LSFET of low-side Power GaN FET
750
OSS High-Side OSS Low-Side
1000 625 800 500 600 375
Capacitance (pF) Capacitance (pF)
400 250 125 200 0 0 0 25 50 75 100 0 25 50 75 100
VDS - Drain-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V)
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