DMOS Microstepping DriverA4988with Translator and Overcurrent Protection t A tB STEP t t C D MS1, MS2, MS3, RESET, or DIR Time DurationSymbolTyp.Unit STEP minimum, HIGH pulse width tA 1 μs STEP minimum, LOW pulse width tB 1 μs Setup time, input change to STEP tC 200 ns Hold time, input change to STEP tD 200 ns Figure 1: Logic Interface Timing Diagram Table 1: Microstepping Resolution Truth Table MS1 MS2 MS3 Microstep Resolution Excitation Mode L L L Full Step 2 Phase H L L Half Step 1-2 Phase L H L Quarter Step W1-2 Phase H H L Eighth Step 2W1-2 Phase H H H Sixteenth Step 4W1-2 Phase 6 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com