Datasheet MAX16126, MAX16127 (Analog Devices) - 9

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MAX16126/MAX16127
Load-Dump/Reverse-Voltage Protection Circuits undervoltage threshold, the charge pump turns on after The MAX16126 can be configured to latch off (suffix
D
) a 150µs delay. even after the overvoltage condition ends. The latch is During a fault condition, GATE is pulled to ground with a cleared by cycling IN below the undervoltage threshold or 8.8mA (min) pulldown current. Note that an external zener by toggling SHDN. diode is required to be connected between the gate and The devices can also be configured to retry: source of the external MOSFETs. See the Applications ● One time, then latch off (suffix B) Information section. ● Three times, then latch off (suffix C)
Overvoltage Protection
● Always retry and never latch off (suffix A) The MAX16126/MAX16127 detect overvoltage conditions using a comparator that is connected through an external There is a fixed 150ms (typ) delay between each retry resistive divider to the input or output voltage. An overvolt- attempt. If the overvoltage fault condition is gone when a age condition causes the GATE output to go low, turning retry is attempted, GATE goes high and power is restored off the external MOSFETs. to the downstream circuitry. FLAG also asserts to indicate the fault condition.
Undervoltage Protection Overvoltage Limiter (MAX16127)
The MAX16126/MAX16127 monitor the input voltage In overvoltage limiter mode, the output voltage is regu- for undervoltage conditions. If the input voltage is below lated at the overvoltage threshold voltage and continues the undervoltage threshold (VIN < VTH - VTH-HYS), to supply power to downstream devices. In this mode, the GATE goes low, turning off the external MOSFETs and device operates like a voltage regulator. FLAG asserts. When the input voltage exceeds the undervoltage threshold (V During normal operation, GATE is enhanced 9V above IN > VTH), GATE goes high after a 150µs delay (typ). SRC. The output voltage is monitored through a resis- tive divider between OUT and OVSET. When OUT rises For the MAX16126/MAX16127, an external resistive above the overvoltage threshold, GATE goes low and the divider connected between TERM, UVSET, and GND MOSFETs turn off. As the voltage on OUT falls below the sets the undervoltage threshold (TERM is connected to overvoltage threshold minus the threshold hysteresis, IN when SHDN is high). GATE goes high and the MOSFETs turn back on again,
Thermal Shutdown
regulating OUT in a switched-linear mode at the overvolt- The MAX16126/MAX16127 thermal shutdown feature age threshold. turns off the MOSFETs if the internal die tempera- The switching frequency depends on the gate charge of ture exceeds +145°C (TJ). By ensuring good thermal the MOSFETs, the charge-pump current, the output load coupling between the MOSFETs and the MAX16126/ current, and the output capacitance. MAX16127, the thermal shutdown can turn off the Caution must be exercised when operating the MOSFETs if they overheat. MAX16127 in voltage-limiting mode for long durations. When the junction temperature exceeds TJ = +145°C Since MOSFETs can dissipate power continuously during (typ), the internal thermal sensor signals the shutdown this interval, proper heat sinking should be implemented logic, pulling the GATE voltage low and allowing the to prevent damage to them. device to cool. When TJ drops by 15°C (typ), GATE goes
Overvoltage Switch (MAX16126)
high and the MOSFETs turn back on. Do not exceed the absolute maximum junction-temperature rating of In the overvoltage switch mode, the internal overvolt- T age comparator monitors the input voltage and the load J = +150°C. is completely disconnected from the input during an
Flag Output (FLAG)
overvoltage event. When the input voltage exceeds the An open-drain FLAG output indicates fault conditions. overvoltage threshold, GATE goes low and the MOSFETs During startup, FLAG is initially low and goes high turn off, disconnecting the input from the load. After that, impedance when VOUT is greater than 90% of VIN if no for the autoretry mode version, the autoretry timer starts, fault conditions are present. FLAG asserts low during while for the latched mode version a power cycle to IN or shutdown mode, an overvoltage, thermal shutdown, or a cycle on SHDN is needed to turn the external MOSFETs undervoltage fault, or when VOUT falls below 90% of VIN. back on. www.analog.com Analog Devices │ 9