Datasheet OPA186 (Texas Instruments) - 8
Hersteller | Texas Instruments |
Beschreibung | Single, 24-V, low-power (90 μA) 5-μV-offset zero-drift op amp with rail-to-rail input and o |
Seiten / Seite | 49 / 8 — OPA186, OP. A2186, OP. A4186. www.ti.com. 6.7 Electrical Characteristics … |
Dateiformat / Größe | PDF / 2.6 Mb |
Dokumentensprache | Englisch |
OPA186, OP. A2186, OP. A4186. www.ti.com. 6.7 Electrical Characteristics (continued). PARAMETER. TEST CONDITIONS. MIN. TYP. MAX. UNIT. OUTPUT

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OPA186, OP A2186, OP A4186
SBOS968C – JUNE 2022 – REVISED JULY 2023
www.ti.com 6.7 Electrical Characteristics (continued)
at TA = 25°C, VS = ±2.25 V to ±12 V, RL = 10 kΩ connected to VS / 2, VCM = VOUT = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTPUT
No load 5 10 RL = 10 kΩ 65 Positive rail RL = 2 kΩ 345 425 RL = 10 kΩ, Voltage output swing from TA = –40℃ to +125℃(1) 95 120 VO mV the rail No load 5 10 RL = 10 kΩ 30 Negative rail RL = 2 kΩ 90 120 RL = 10 kΩ, TA = –40℃ to +125℃(1) 35 50 ISC Short-circuit current ±20 mA CLOAD Capacitive load drive See typical curves Open-loop output RO See typical curves impedance
POWER SUPPLY
Quiescent current per 90 130 IQ V µA amplifier S = ±2.25 V to ±12 V TA = –40℃ to +125℃(1) 150 (1) Specification established from device population bench system measurements across multiple lots. 8 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: OPA186 OPA2186 OPA4186 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA186 6.5 Thermal Information: OPA2186 6.6 Thermal Information: OPA4186 6.7 Electrical Characteristics 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Rail-to-Rail Inputs 7.3.2 Phase-Reversal Protection 7.3.3 Input Bias Current Clock Feedthrough 7.3.4 EMI Rejection 7.3.4.1 EMIRR +IN Test Configuration 7.3.5 Electrical Overstress 7.3.6 MUX-Friendly Inputs 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.1.1 Basic Noise Calculations 8.2 Typical Applications 8.2.1 High-Side Current Sensing 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curve 8.2.2 Bridge Amplifier 8.3 Power Supply Recommendations 8.4 Layout 8.4.1 Layout Guidelines 8.4.2 Layout Example 9 Device and Documentation Support 9.1 Device Support 9.1.1 Development Support 9.1.1.1 PSpice® for TI 9.1.1.2 TINA-TI™ Simulation Software (Free Download) 9.2 Documentation Support 9.2.1 Related Documentation 9.3 Receiving Notification of Documentation Updates 9.4 Support Resources 9.5 Trademarks 9.6 Electrostatic Discharge Caution 9.7 Glossary 10 Mechanical, Packaging, and Orderable Information