Datasheet OPA4388 (Texas Instruments) - 5
| Hersteller | Texas Instruments |
| Beschreibung | Quad, 10-MHz, CMOS, zero-drift, zero-crossover, true RRIO precision operational amplifier |
| Seiten / Seite | 50 / 5 — OPA388. , OPA2388. , OPA4388. www.ti.com. Figure 5-3. OPA2388 8-Pin SOIC … |
| Dateiformat / Größe | PDF / 3.3 Mb |
| Dokumentensprache | Englisch |
OPA388. , OPA2388. , OPA4388. www.ti.com. Figure 5-3. OPA2388 8-Pin SOIC (D) Package and. 8-Pin VSSOP (DGK) Package, Top View
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OPA388 , OPA2388 , OPA4388 www.ti.com
SBOS777D – NOVEMBER 2016 – REVISED JULY 2020 OUT A 1 8 V+ OUT A 1 14 OUT D 2 ±IN A 7 OUT B 2 ±IN A 13 ±IN D +IN A 3 6 ±IN B +IN A 3 12 +IN D V 4 ± 5 +IN B V+ 4 11 V± +IN B 5 10 +IN C Not to scale 6
Figure 5-3. OPA2388 8-Pin SOIC (D) Package and
±IN B 9 ±IN C
8-Pin VSSOP (DGK) Package, Top View
OUT B 7 8 OUT C Not to scale
Figure 5-4. OPA4388 14-Pin SOIC (D) and TSSOP-14 (PW) Packages, Top View Pin Functions: OPA2388 and OPA4388 PIN OPA2388 OPA4388 I/O DESCRIPTION NAME D (SOIC), D (SOIC), DGK (VSSOP) PW (TSSOP)
–IN A 2 2 I Inverting input, channel A –IN B 6 6 I Inverting input, channel B –IN C — 9 I Inverting input, channel C –IN D — 13 I Inverting input, channel D +IN A 3 3 I Noninverting input, channel A +IN B 5 5 I Noninverting input, channel B +IN C — 10 I Noninverting input, channel C +IN D — 12 I Noninverting input, channel D OUT A 1 1 O Output, channel A OUT B 7 7 O Output, channel B OUT C — 8 O Output, channel C OUT D — 14 O Output, channel D V– 4 11 — Negative (lowest) power supply V+ 8 4 — Positive (highest) power supply Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: OPA388 OPA2388 OPA4388 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA388 6.5 Thermal Information: OPA2388 6.6 Thermal Information: OPA4388 6.7 Electrical Characteristics: VS = ±1.25 V to ±2.75 V (VS = 2.5 to 5.5 V) 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Operating Voltage 7.3.2 Input Voltage and Zero-Crossover Functionality 7.3.3 Input Differential Voltage 7.3.4 Internal Offset Correction 7.3.5 EMI Susceptibility and Input Filtering 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 Bidirectional Current-Sensing 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curve 8.2.2 Single Operational Amplifier Bridge Amplifier 8.2.3 Precision, Low-Noise, DAC Buffer 8.2.4 Load Cell Measurement 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 TINA-TI™ Simulation Software (Free Download) 11.1.1.2 TI Precision Designs 11.2 Documentation Support 11.2.1 Related Documentation 11.3 Related Links 11.4 Receiving Notification of Documentation Updates 11.5 Support Resources 11.6 Trademarks 11.7 Electrostatic Discharge Caution 11.8 Glossary 12 Mechanical, Packaging, and Orderable Information
SBOS777D – NOVEMBER 2016 – REVISED JULY 2020 OUT A 1 8 V+ OUT A 1 14 OUT D 2 ±IN A 7 OUT B 2 ±IN A 13 ±IN D +IN A 3 6 ±IN B +IN A 3 12 +IN D V 4 ± 5 +IN B V+ 4 11 V± +IN B 5 10 +IN C Not to scale 6
Figure 5-3. OPA2388 8-Pin SOIC (D) Package and
±IN B 9 ±IN C
8-Pin VSSOP (DGK) Package, Top View
OUT B 7 8 OUT C Not to scale
Figure 5-4. OPA4388 14-Pin SOIC (D) and TSSOP-14 (PW) Packages, Top View Pin Functions: OPA2388 and OPA4388 PIN OPA2388 OPA4388 I/O DESCRIPTION NAME D (SOIC), D (SOIC), DGK (VSSOP) PW (TSSOP)
–IN A 2 2 I Inverting input, channel A –IN B 6 6 I Inverting input, channel B –IN C — 9 I Inverting input, channel C –IN D — 13 I Inverting input, channel D +IN A 3 3 I Noninverting input, channel A +IN B 5 5 I Noninverting input, channel B +IN C — 10 I Noninverting input, channel C +IN D — 12 I Noninverting input, channel D OUT A 1 1 O Output, channel A OUT B 7 7 O Output, channel B OUT C — 8 O Output, channel C OUT D — 14 O Output, channel D V– 4 11 — Negative (lowest) power supply V+ 8 4 — Positive (highest) power supply Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: OPA388 OPA2388 OPA4388 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA388 6.5 Thermal Information: OPA2388 6.6 Thermal Information: OPA4388 6.7 Electrical Characteristics: VS = ±1.25 V to ±2.75 V (VS = 2.5 to 5.5 V) 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Operating Voltage 7.3.2 Input Voltage and Zero-Crossover Functionality 7.3.3 Input Differential Voltage 7.3.4 Internal Offset Correction 7.3.5 EMI Susceptibility and Input Filtering 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 Bidirectional Current-Sensing 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curve 8.2.2 Single Operational Amplifier Bridge Amplifier 8.2.3 Precision, Low-Noise, DAC Buffer 8.2.4 Load Cell Measurement 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 TINA-TI™ Simulation Software (Free Download) 11.1.1.2 TI Precision Designs 11.2 Documentation Support 11.2.1 Related Documentation 11.3 Related Links 11.4 Receiving Notification of Documentation Updates 11.5 Support Resources 11.6 Trademarks 11.7 Electrostatic Discharge Caution 11.8 Glossary 12 Mechanical, Packaging, and Orderable Information