Datasheet 6ED2230S12T (Infineon) - 5

HerstellerInfineon
Beschreibung1200 V Three Phase Gate Driver with Integrated Bootstrap Diode and OCP
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Revision01_03
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DokumentenspracheEnglisch

6ED2230S12T. 1200 V Three Phase Gate Driver with Integrated Bootstrap Diode and OCP. Lead configuration. Table 1

6ED2230S12T 1200 V Three Phase Gate Driver with Integrated Bootstrap Diode and OCP Lead configuration Table 1

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6ED2230S12T 1200 V Three Phase Gate Driver with Integrated Bootstrap Diode and OCP Lead configuration 2 Lead configuration Table 1 Lead definitions Symbol Description
HIN1,2,3 Logic input for high side gate driver output (HO), in phase LIN1,2,3 Logic input for low side gate driver output (LO), in phase VB1,2,3 High side floating supply HO1,2,3 High side gate drive output VS1,2,3 High side floating supply return VCC Low side and logic fixed supply LO Low side gate drive output COM Low side return VSS Logic ground ITRIP Analog input for over-current shutdown. When active, ITRIP shuts down outputs and activates RFE low. When ITRIP becomes inactive, RFE stays active low for an externally set time tFLTCLR, then automatically becomes inactive (open-drain high impedance). RFE Integrated fault reporting function like over-current (ITRIP), or low-side undervoltage lockout and the fault clear timer. This pin has negative logic and an open-drain output. The use of over-current protection requires the use of external components. HIN1 1 28 VB1 HIN2 2 27 HO1 HIN3 3 26 VS1 LIN1 4 25 LIN2 5 24 LIN3 6 23 VB2 ITRIP 7 22 HO2 RFE 8 21 VS2 VCC 9 20 VSS 10 19 COM 11 18 VB3 LO1 12 17 HO3 LO2 13 16 VS3 LO3 14 15 NC
Figure 3 Lead Assignments
Datasheet 5 Document Outline Features Typical applications Description Product validation Device information Table of contents 1 Block diagram 2 Lead configuration 3 Absolute maximum ratings 4 Recommended operating conditions 5 Electrical characteristics 5.1 Static electrical characteristics 5.2 Dynamic electrical characteristics 6 Application information and additional details 6.1 IGBT/MOSFET gate drive 6.2 Switching and timing relationships 6.2.1 Deadtime 6.2.2 Matched propagation delays 6.3 Input logic compatibility 6.4 Undervoltage lockout protection 6.5 Shoot-Through protection 6.6 Enable input 6.7 Fault reporting and programmable fault clear timer 6.8 Over-Current protection 6.9 Truth table: Undervoltage lockout, ITRIP, and ENABLE 6.10 Advanced input filter 6.11 Short-Pulse / Noise rejection 6.12 Integrated bootstrap diodes 6.13 Tolerant to negative VS transients 6.14 PCB layout tips 6.15 Additional documentation 7 Package information 7.1 Package information DSO-24 (DSO-28 4 pin removed) 8 Qualification information 9 Related products Revision history Insert from: "6EDL05I12.pdf" 6EDL05I12.vsdx Page-4