Datasheet MAX4684, MAX4685 (Maxim) - 9
| Hersteller | Maxim |
| Beschreibung | 0.5Ω/0.8Ω Low-Voltage, Dual SPDT Analog Switches in UCSP |
| Seiten / Seite | 10 / 9 — Test Circuits/Timing Diagrams (continued). MAX4684. MAX4685. Ordering … |
| Dateiformat / Größe | PDF / 2.0 Mb |
| Dokumentensprache | Englisch |
Test Circuits/Timing Diagrams (continued). MAX4684. MAX4685. Ordering Information. PART. TEMP RANGE PIN/BUMP-. TOP. PACKAGE. MARK. Note:
Modelllinie für dieses Datenblatt
Textversion des Dokuments
MAX4684/MAX4685 0.5Ω/0.8Ω Low-Voltage, Dual SPDT Analog Switches in UCSP
Test Circuits/Timing Diagrams (continued)
+5V 10nF OFF-ISOLATION = 20log VOUT NETWORK VIN ANALYZER V+ 0V OR V+ IN_ V 50Ω 50Ω IN ON-LOSS = 20log VOUT COM VIN NC_
MAX4684
CROSSTALK = 20log VOUT
MAX4685
V VIN OUT MEAS REF NO 50Ω GND 50Ω 50Ω MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 5. On-Loss, Off-Isolation, and Crosstalk
Ordering Information
10nF V+
PART TEMP RANGE PIN/BUMP- TOP PACKAGE MARK MAX4684
EBC+T -40°C to +85°C 12 UCSP* AAF V+ MAX4684ETB+T -40°C to +85°C 10 TDFN-EP** AAG COM_
MAX4684
MAX4684EUB+T -40°C to +85°C 10 µMAX® —
MAX4685
MAX4684AEBC+T -40°C to +85°C 12 UCSP* AEJ IN VIL
MAX4685
EBC+T -40°C to +85°C 12 UCSP* AAG CAPACITANCE OR METER VIH MAX4685ETB+T -40°C to +85°C 10 TDFN-EP** AAH NC_ or NO_ MAX4685EUB+T -40°C to +85°C 10 µMAX — f = 1MHz GND +Denotes a lead(Pb)-free/RoHS-compliant package.
Note:
Requires special solder temperature profile described in the Absolute Maximum Ratings section. *UCSP reliability is integrally linked to the user’s assembly Figure 6. Channel Off/On-Capacitance methods, circuit board material, and environment. Refer to the UCSP Reliability Notice in the UCSP Reliability section of this data sheet for more information. **EP = Exposed Pad T = Tape and reel.
Chip Information
PROCESS: BiCMOS www.maximintegrated.com Maxim Integrated │
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Test Circuits/Timing Diagrams (continued)
+5V 10nF OFF-ISOLATION = 20log VOUT NETWORK VIN ANALYZER V+ 0V OR V+ IN_ V 50Ω 50Ω IN ON-LOSS = 20log VOUT COM VIN NC_
MAX4684
CROSSTALK = 20log VOUT
MAX4685
V VIN OUT MEAS REF NO 50Ω GND 50Ω 50Ω MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 5. On-Loss, Off-Isolation, and Crosstalk
Ordering Information
10nF V+
PART TEMP RANGE PIN/BUMP- TOP PACKAGE MARK MAX4684
EBC+T -40°C to +85°C 12 UCSP* AAF V+ MAX4684ETB+T -40°C to +85°C 10 TDFN-EP** AAG COM_
MAX4684
MAX4684EUB+T -40°C to +85°C 10 µMAX® —
MAX4685
MAX4684AEBC+T -40°C to +85°C 12 UCSP* AEJ IN VIL
MAX4685
EBC+T -40°C to +85°C 12 UCSP* AAG CAPACITANCE OR METER VIH MAX4685ETB+T -40°C to +85°C 10 TDFN-EP** AAH NC_ or NO_ MAX4685EUB+T -40°C to +85°C 10 µMAX — f = 1MHz GND +Denotes a lead(Pb)-free/RoHS-compliant package.
Note:
Requires special solder temperature profile described in the Absolute Maximum Ratings section. *UCSP reliability is integrally linked to the user’s assembly Figure 6. Channel Off/On-Capacitance methods, circuit board material, and environment. Refer to the UCSP Reliability Notice in the UCSP Reliability section of this data sheet for more information. **EP = Exposed Pad T = Tape and reel.
Chip Information
PROCESS: BiCMOS www.maximintegrated.com Maxim Integrated │
9