Datasheet ADP1851 (Analog Devices) - 6

HerstellerAnalog Devices
BeschreibungWide Range Input, Synchronous, Step-Down DC-to-DC Controller
Seiten / Seite24 / 6 — ADP1851. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. Parameter. Rating. …
RevisionB
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DokumentenspracheEnglisch

ADP1851. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. Parameter. Rating. ESD CAUTION

ADP1851 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2 Parameter Rating ESD CAUTION

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ADP1851 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2.
Stresses at or above those listed under Absolute Maximum
Parameter Rating
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these VIN, EN, RAMP 21 V or any other conditions above those indicated in the operational FB, COMP, SS/TRK, FREQ, SYNC, VCCO, −0.3 V to +6 V PGOOD section of this specification is not implied. Operation beyond ILIM, SW to PGND −0.3 V to +21 V the maximum operating conditions for extended periods may BST, DH to PGND −0.3 V to +28 V affect product reliability. DL to PGND −0.3 V to VCCO + 0.3 V Absolute maximum ratings apply individually only, not in BST to SW −0.3 V to +6 V combination. Unless otherwise specified, all other voltages are BST to PGND, 20 ns Transients 32 V referenced to AGND. SW to PGND, 20 ns Transients 25 V
ESD CAUTION
DL, SW, ILIM to PGND, 20 ns −8 V Negative Transients PGND to AGND −0.3 V to +0.3 V PGND to AGND, 20 ns Transients −8 V to +4 V θJA (Natural Convection)1, 2 40°C/W Operating Junction Temperature Range3 −40°C to +125°C Storage Temperature Range −65°C to +150°C Maximum Soldering Lead Temperature 260°C 1 Measured with exposed pad attached to PCB. 2 Junction-to-ambient thermal resistance (θJA) of the package was calculated or simulated on a multilayer PCB. 3 The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation of the device (PD), and the junction- to-ambient thermal resistance of the package (θJA). Maximum junction temperature is calculated from the ambient temperature and power dissipation using the formula TJ = TA + PD × θJA. Rev. B | Page 6 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL OPERATION CIRCUIT REVISION HISTORY SIMPLIFIED BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL ARCHITECTURE OSCILLATOR FREQUENCY SYNCHRONIZATION PWM AND PULSE SKIP MODES OF OPERATION SYNCHRONOUS RECTIFIER AND DEAD TIME INPUT UNDERVOLTAGE LOCKOUT INTERNAL LINEAR REGULATOR OVERVOLTAGE PROTECTION POWER GOOD SHORT-CIRCUIT AND CURRENT-LIMIT PROTECTION ENABLE/DISABLE CONTROL THERMAL OVERLOAD PROTECTION APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL SETTING THE OUTPUT VOLTAGE SOFT START SETTING THE CURRENT LIMIT ACCURATE CURRENT-LIMIT SENSING INPUT CAPACITOR SELECTION VIN PIN FILTER BOOST CAPACITOR SELECTION INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION MOSFET SELECTION LOOP COMPENSATION—VOLTAGE MODE Type III Compensation LOOP COMPENSATION—CURRENT MODE Setting the Slope Compensation Setting the Current Sense Gain Type II Compensation SWITCHING NOISE AND OVERSHOOT REDUCTION VOLTAGE TRACKING Coincident Tracking Ratiometric Tracking PCB LAYOUT GUIDELINES TYPICAL OPERATING CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE