Datasheet AD538 (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungReal-Time Analog Computational Unit (ACU)
Seiten / Seite16 / 10 — AD538. FUNCTIONAL DESCRIPTION. STABILITY PRECAUTIONS. Ln Z – Ln X. Ln X. …
RevisionE
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DokumentenspracheEnglisch

AD538. FUNCTIONAL DESCRIPTION. STABILITY PRECAUTIONS. Ln Z – Ln X. Ln X. LOGe. M(Ln Z – Ln X). M(Ln Z – Ln X) +Ln Y. 0.2≤M≤5. ANTILOGe

AD538 FUNCTIONAL DESCRIPTION STABILITY PRECAUTIONS Ln Z – Ln X Ln X LOGe M(Ln Z – Ln X) M(Ln Z – Ln X) +Ln Y 0.2≤M≤5 ANTILOGe

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AD538 FUNCTIONAL DESCRIPTION STABILITY PRECAUTIONS
As shown in Figure 1 and Figure 11, the VZ and VX inputs At higher frequencies, the multistaged signal path of the AD538 connect directly to the input log ratio amplifiers of the AD538. can result in large phase shifts (as illustrated in Figure 11). If a This subsection provides an output voltage proportional to the condition of high incremental gain exists along that path (for natural log of input voltage, VZ, minus the natural log of input example, VO = VY × VZ/VX = 10 V × 10 mV/10 mV = 10 V so voltage, VX. The output of the log ratio subsection at B can be that ΔVO/ΔVX = 1000), then smal amounts of capacitive feedback expressed by the transfer function from VO to the current inputs IZ or IX can result in instability. Appropriate care should be exercised in board layout to prevent kT  V  V = Z capacitive feedback mechanisms under these conditions. B ln  q  VX 
I Ln Z – Ln X X Ln X
where:
LOGe M(Ln Z – Ln X) V
k is 1.3806 × 10−23 J/K.
X M(Ln Z – Ln X) +Ln Y
q is 1.60219 × 10−19 C.
Σ 0.2≤M≤5 Σ ANTILOGe BUFFER
T is in Kelvins.
+ + +
The log ratio configuration may be used alone, if correctly
M I I V Z Y Z
temperature compensated and scaled to the desired output
V
012
O = VY LOG LOG V e e X Ln Z Ln Y
level (see the Applications Information section).
V V Z Y
00959- Figure 11. Model Circuit Under normal operation, the log-ratio output will be directly connected to a second functional block at Input C, the antilog
USING THE VOLTAGE REFERENCES
subsection. This section performs the antilog according to the A stable band gap voltage reference for scaling is included in the transfer function: AD538. It is laser-trimmed to provide a selectable voltage output of  q  +10 V buffered (Pin 4), +2 V unbuffered (Pin 5) or any voltages V = O VYeVC   kT  between +2 V and +10.2 V buffered as shown in Figure 12. The output impedance at Pin 5 is approximately 5 kΩ. Note that any As with the log-ratio circuit included in the AD538, the user loading of this pin produces an error in the +10 V reference may use the antilog subsection by itself. When both subsections voltage. External loads on the +2 V output should be greater are combined, the output at B is tied to C, the transfer function than 500 kΩ to maintain errors less than 1%. of the AD538 computational unit is:  kT  q   V  Z
I

Z 1 8 1 A
   ln   Q  kT    V   X  V e ;V = B C V
25kΩ LOG
O = VY
+2V TO +10.2V V 2 Z RATIO 17 D BUFFERED
which reduces to:
B 3 16 IX
 V  V = Z
REF OUT 4 15 V
O Y V  
X
 V
25kΩ
X 
100Ω 100Ω +2V SIGNAL 5 14
Finally, by increasing the gain, or attenuating the output of the
50kΩ GND INTERNAL
log ratio subsection via resistor programming, it is possible to
11.5kΩ VOLTAGE PWR +V 6 S REFERENCE AD538 13 GND
raise the quantity VZ/VX to the mth power. Without external programming, m is unity. Thus, the overal AD538 transfer
–V 7 S OUTPUT 12 C
function equals:
25kΩ V 8 11 O I ANTILOG Y
m  V  Z =
9 I LOG 10 VY
013 O V Y V   V 
25kΩ
X  00959- where 0.2 < m < 5. Figure 12. +2 V to +10.2 V Adjustable Reference When the AD538 is used as an analog divider, the V In situations not requiring both reference levels, the +2 V output Y input can be used to multiply the ratio V can be converted to a buffered output by tying Pin 4 and Pin 5 Z/VX by a convenient scale factor. The actual multiplication by the V together. If both references are required simultaneously, the Y input signal is accomplished by adding the log of the V +10 V output should be used directly and the +2 V output Y input signal to the signal at C, which is already in the log domain. should be external y buffered. Rev. E | Page 10 of 16 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Re-Examination of Multiplier/Divider Accuracy Functional Description Stability Precautions Using The Voltage References One-Quadrant Multiplication/Division Two-Quadrant Division Log Ratio Operation Analog Computation Of Powers And Roots Square Root Operation Applications Information Transducer Linearization ARC-Tangent Approximation Outline Dimensions Ordering Guide