Datasheet AD9361 (Analog Devices) - 11

Data Sheet AD9361 Table 6. TDD Mode, 2.4 GHz Parameter Min Typ Max Unit Test Conditions/Comments
1RX 5 MHz Bandwidth 175 mA Continuous RX 10 MHz Bandwidth 200 mA Continuous RX 20 MHz Bandwidth 240 mA Continuous RX 2RX 5 MHz Bandwidth 260 mA Continuous RX 10 MHz Bandwidth 305 mA Continuous RX 20 MHz Bandwidth 390 mA Continuous RX 1TX 5 MHz Bandwidth 7 dBm 350 mA Continuous TX −27 dBm 160 mA Continuous TX 10 MHz Bandwidth 7 dBm 380 mA Continuous TX −27 dBm 220 mA Continuous TX 20 MHz Bandwidth 7 dBm 410 mA Continuous TX −27 dBm 260 mA Continuous TX 2TX 5 MHz Bandwidth 7 dBm 580 mA Continuous TX −27 dBm 280 mA Continuous TX 10 MHz Bandwidth 7 dBm 635 mA Continuous TX −27 dBm 330 mA Continuous TX 20 MHz Bandwidth 7 dBm 690 mA Continuous TX −27 dBm 390 mA Continuous TX
Table 7. TDD Mode, 5.5 GHz Parameter Min Typ Max Unit Test Conditions/Comments
1RX 5 MHz Bandwidth 175 mA Continuous RX 40 MHz Bandwidth 275 mA Continuous RX 2RX 5 MHz Bandwidth 270 mA Continuous RX 40 MHz Bandwidth 445 mA Continuous RX 1TX 5 MHz Bandwidth 7 dBm 400 mA Continuous TX −27 dBm 240 mA Continuous TX 40 MHz Bandwidth 7 dBm 490 mA Continuous TX −27 dBm 385 mA Continuous TX 2TX 5 MHz Bandwidth 7 dBm 650 mA Continuous TX −27 dBm 335 mA Continuous TX 40 MHz Bandwidth 7 dBm 820 mA Continuous TX −27 dBm 500 mA Continuous TX Rev. F | Page 11 of 36 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS CURRENT CONSUMPTION—VDD_INTERFACE CURRENT CONSUMPTION—VDDD1P3_DIG AND VDDAx (COMBINATION OF ALL 1.3 V SUPPLIES) ABSOLUTE MAXIMUM RATINGS REFLOW PROFILE THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 800 MHz FREQUENCY BAND 2.4 GHz FREQUENCY BAND 5.5 GHz FREQUENCY BAND THEORY OF OPERATION GENERAL RECEIVER TRANSMITTER CLOCK INPUT OPTIONS SYNTHESIZERS RF PLLs BB PLL DIGITAL DATA INTERFACE DATA_CLK Signal FB_CLK Signal RX_FRAME Signal ENABLE STATE MACHINE SPI Control Mode Pin Control Mode SPI INTERFACE CONTROL PINS Control Outputs (CTRL_OUT[7:0]) Control Inputs (CTRL_IN[3:0]) GPO PINS (GPO_3 TO GPO_0) AUXILIARY CONVERTERS AUXADC AUXDAC1 and AUXDAC2 POWERING THE AD9361 PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE