Datasheet AP64351Q (Diodes) - 3

HerstellerDiodes
BeschreibungAutomotive-compliant, 40V, 3.5A Synchronous Buck with Programmable Soft-Start Time
Seiten / Seite26 / 3 — AP64351Q. Pin Descriptions. Pin Name. Pin Number. Function. Input …
Dateiformat / GrößePDF / 1.4 Mb
DokumentenspracheEnglisch

AP64351Q. Pin Descriptions. Pin Name. Pin Number. Function. Input Capacitor. Enable. Programming Soft-Start Time

AP64351Q Pin Descriptions Pin Name Pin Number Function Input Capacitor Enable Programming Soft-Start Time

Modelllinie für dieses Datenblatt

Textversion des Dokuments

AP64351Q Pin Descriptions Pin Name Pin Number Function
High-Side Gate Drive Boost Input. BST supplies the drive for the high-side N-Channel power MOSFET. A 100nF BST 1 capacitor is recommended from BST to SW to power the high-side driver. Power Input. VIN supplies the power to the IC as well as the step-down converter power MOSFETs. Drive VIN with a VIN 2 3.8V to 40V power source. Bypass VIN to GND with a suitably large capacitor to eliminate noise due to the switching of the IC. See
Input Capacitor
section for more details. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator and low to EN 3 turn it off. Connect to VIN or leave floating for automatic startup. The EN has a precision threshold of 1.18V for programing the UVLO. See
Enable
section for more details. Soft-start. Place a ceramic capacitor from this pin to ground to program soft-start time. An internal 4μA current source SS 4 pulls the SS pin to VCC. See
Programming Soft-Start Time
section for more details. Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. FB 5 See
Setting the Output Voltage
section for more details. Compensation. Connect an external RC network to the COMP pin to adjust the loop response. COMP 6 See
External Loop Compensation Design
section for more details. GND 7 Power Ground. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter SW 8 from SW to the output load. EXPOSED Heat dissipation path of the die. The exposed thermal pad must be electrically connected to GND and must be 9 PAD connected to the ground plane of the PCB for proper operation and optimized thermal performance.

AP64351Q 3 of 26 June 2020 Document number: DS42746 Rev. 1 - 2
www.diodes.com
© Diodes Incorporated