Datasheet TPD7107F (Toshiba) - 4
| Hersteller | Toshiba |
| Beschreibung | Intelligent Power Device Silicon Power MOS Integrated Circuit |
| Seiten / Seite | 34 / 4 — TPD7107F. 7. Operational Description 7.1. Protection for reverse … |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
TPD7107F. 7. Operational Description 7.1. Protection for reverse connection of power supply
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TPD7107F 7. Operational Description 7.1. Protection for reverse connection of power supply
Reverse connection circuit turns on external FET via M1 in the figure and reduces external FET loss to prevent thermal destruction.
Figure 7.1 Reverse connection circuit. 7.2. Active clamp
Active clamp is a function that keeps the voltage between drain and source of external FET below at the break down voltage. When the surge voltage is generated by the inductive load, the voltage between VDD and SHUNT increases and the active clamp circuit in Figure7.2 outputs the voltage to the GATE pin. Therefore, the external FET wil be in ON state and the voltage between drain and source of external FET wil be clamped.
Figure 7.2 Active clamp circuit.
© 2 020 4 2020-04-09 Toshiba Electronic Devices & Storage Corporation Document Outline 1. Description 2. Uses 3. Features 4. Block Diagram 5. Pin Assignments 6. Pin Description 7. Operational Description 7.1. Protection for reverse connection of power supply 7.2. Active clamp 7.3. Gate drive of Power MOSFET (Off driver) 7.3.1. Normal off, rapid off 7.3.2. Protection for disconnection of GND terminal 7.4. Load current sense at time of Power MOSFET drive 7.5. The abnormalities in power supply voltage (VDD over voltage, VDD under voltage) 7.6. Over current protection 7.7. Over temperature protection. 7.8. Abnormalities in voltage between Drain and source of the external FET (VDS error) 7.9. Load open / VDD short of load line and diagnosis output 7.10. Truth Table 7.11. State Transition Diagram 8. Absolute Maximum Ratings 8.1. Thermal Resistance 9. Operating Ranges 10. Electrical Characteristics 10.1. Electrical characteristics 1 10.2. Electrical characteristics 2 10.3. Current sense amp Electrical Characteristics 11. Test Circuit 11.1. Test circuit 1 High level output voltage (3) 11.2. Test circuit 2 Switching time (Td-ON, Td-OFF, Tr, Tf) 11.3. Test circuit 3 Off impedance at GND open 11.4. Test circuit 4 Input offset voltage 12. Characteristic curves 13. Package Information 13.1. Package Dimensions 13.2. Marking 13.3. Land Pattern Dimensions for Reference only 14. IC Usage Notes 14.1. Notes on Handling of ICs 14.2. Notes on mounting. RESTRICTIONS ON PRODUCT USE
Reverse connection circuit turns on external FET via M1 in the figure and reduces external FET loss to prevent thermal destruction.
Figure 7.1 Reverse connection circuit. 7.2. Active clamp
Active clamp is a function that keeps the voltage between drain and source of external FET below at the break down voltage. When the surge voltage is generated by the inductive load, the voltage between VDD and SHUNT increases and the active clamp circuit in Figure7.2 outputs the voltage to the GATE pin. Therefore, the external FET wil be in ON state and the voltage between drain and source of external FET wil be clamped.
Figure 7.2 Active clamp circuit.
© 2 020 4 2020-04-09 Toshiba Electronic Devices & Storage Corporation Document Outline 1. Description 2. Uses 3. Features 4. Block Diagram 5. Pin Assignments 6. Pin Description 7. Operational Description 7.1. Protection for reverse connection of power supply 7.2. Active clamp 7.3. Gate drive of Power MOSFET (Off driver) 7.3.1. Normal off, rapid off 7.3.2. Protection for disconnection of GND terminal 7.4. Load current sense at time of Power MOSFET drive 7.5. The abnormalities in power supply voltage (VDD over voltage, VDD under voltage) 7.6. Over current protection 7.7. Over temperature protection. 7.8. Abnormalities in voltage between Drain and source of the external FET (VDS error) 7.9. Load open / VDD short of load line and diagnosis output 7.10. Truth Table 7.11. State Transition Diagram 8. Absolute Maximum Ratings 8.1. Thermal Resistance 9. Operating Ranges 10. Electrical Characteristics 10.1. Electrical characteristics 1 10.2. Electrical characteristics 2 10.3. Current sense amp Electrical Characteristics 11. Test Circuit 11.1. Test circuit 1 High level output voltage (3) 11.2. Test circuit 2 Switching time (Td-ON, Td-OFF, Tr, Tf) 11.3. Test circuit 3 Off impedance at GND open 11.4. Test circuit 4 Input offset voltage 12. Characteristic curves 13. Package Information 13.1. Package Dimensions 13.2. Marking 13.3. Land Pattern Dimensions for Reference only 14. IC Usage Notes 14.1. Notes on Handling of ICs 14.2. Notes on mounting. RESTRICTIONS ON PRODUCT USE