link to page 28 link to page 28 link to page 25 AD4000/AD4004/AD4008Data SheetCS MODE, 3-WIRE TURBO MODE When SDI is forced high, a rising edge on CNV initiates a This mode is typical y used when a single AD4000/AD4004/ conversion. The previous conversion data is available to read AD4008 device is connected to an SPI-compatible digital host. It after the CNV rising edge. The user must wait tQUIET1 time after provides additional time during the end of the ADC conversion CNV is brought high before bringing CNV low to clock out the process to clock out the previous conversion result, providing a previous conversion result. The user must also wait tQUIET2 time lower SCK rate. The AD4000 can achieve a throughput rate of after the last falling edge of SCK to when CNV is brought high. 2 MSPS only when turbo mode is enabled and using a minimum When the conversion is complete, the AD4000/AD4004/AD4008 SCK rate of 70 MHz. With turbo mode enabled, the AD4004 enter the acquisition phase and power down. When CNV goes can also achieve its maximum throughput rate of 1 MSPS with a low, the MSB is output to SDO. The remaining data bits are minimum SCK rate of 22 MHz, and the AD4008 can achieve its clocked by subsequent SCK falling edges. The data is valid on maximum throughput rate of 500 kSPS with a minimum SCK rate both SCK edges. Although the rising edge can capture the data, of 10 MHz. The connection diagram is shown in Figure 50, and a digital host using the SCK falling edge allows a faster reading the corresponding timing diagram is shown in Figure 51. rate, provided it has an acceptable hold time. After the 16th SCK This mode replaces the 3-wire with busy indicator mode by falling edge or when CNV goes high (whichever occurs first), programming the turbo mode bit, Bit 1 (see Table 14). SDO returns to high impedance. CONVERTCNVDIGITAL HOSTVIOAD4000/SDIAD4004/SDODATA INAD4008SCK 147 CLK 14956- Figure 50. CS Mode, 3-Wire Turbo Mode Connection Diagram (SDI High) SDI = 1tCYCCNVtACQACQUISITIONCONVERSIONACQUISITIONtSCKCONVtSCKLQUIET2tQUIET1SCK123141516tHSDOtSCKHtENtDSDOtDISSDOD15D14D13D1D0 026 14956- Figure 51. CS Mode, 3-Wire Turbo Mode Serial Interface Timing Diagram (SDI High) Rev. C | Page 28 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION TRANSFER FUNCTIONS APPLICATIONS INFORMATION TYPICAL APPLICATION DIAGRAMS ANALOG INPUTS Input Overvoltage Clamp Circuit Switched Capacitor Input RC Filter Values DRIVER AMPLIFIER CHOICE High Frequency Input Signals Multiplexed Applications EASE OF DRIVE FEATURES Input Span Compression High-Z Mode Long Acquisition Phase VOLTAGE REFERENCE INPUT POWER SUPPLY DIGITAL INTERFACE REGISTER READ/WRITE FUNCTIONALITY STATUS WORD CSB MODE, 3-WIRE TURBO MODE CSB MODE, 3-WIRE WITHOUT BUSY INDICATOR CSB MODE, 3-WIRE WITH BUSY INDICATOR CSB MODE, 4-WIRE TURBO MODE CSB MODE, 4-WIRE WITHOUT BUSY INDICATOR CSB MODE, 4-WIRE WITH BUSY INDICATOR DAISY-CHAIN MODE LAYOUT GUIDELINES EVALUATING THE AD4000/AD4004/AD4008 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE