X9418 Datasheet (Renesas) - 6

HerstellerRenesas
BeschreibungLow Noise/Low Power/2-Wire Bus
Seiten / Seite20 / 6 — Table 1. Instruction Set. Instruction Set. Instruction. Operation. I2 I1 …
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Table 1. Instruction Set. Instruction Set. Instruction. Operation. I2 I1 I0 R1 R0 P1 P0. Note:

Table 1 Instruction Set Instruction Set Instruction Operation I2 I1 I0 R1 R0 P1 P0 Note:

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X9418
Table 1. Instruction Set Instruction Set Instruction I Operation 3 I2 I1 I0 R1 R0 P1 P0
Read Wiper Counter 1 0 0 1 0 0 0 1/0 Read the contents of the Wiper Counter Register Register pointed to by P0 Write Wiper Counter 1 0 1 0 0 0 0 1/0 Write new value to the Wiper Counter Register Register pointed to by P0 Read Data Register 1 0 1 1 1/0 1/0 0 1/0 Read the contents of the Data Register pointed to by P0 and R1 - R0 Write Data Register 1 1 0 0 1/0 1/0 0 1/0 Write new value to the Data Register pointed to by P0 and R1 - R0 XFR Data Register to 1 1 0 1 1/0 1/0 0 1/0 Transfer the contents of the Data Register pointed to Wiper Counter Register by P0 and R1 - R0 to its associated Wiper Counter Register XFR Wiper Counter 1 1 1 0 1/0 1/0 0 1/0 Transfer the contents of the Wiper Counter Register Register to Data Register pointed to by P0 to the Data Register pointed to by R1 - R0 Global XFR Data 0 0 0 1 1/0 1/0 0 0 Transfer the contents of the Data Registers pointed Registers to Wiper to by R1 - R0 of both pots to their respective Wiper Counter Registers Counter Registers Global XFR Wiper Count- 1 0 0 0 1/0 1/0 0 0 Transfer the contents of both Wiper Counter er Registers to Data Reg- Registers to their respective data Registers pointed ister to by R1 - R0 of both pots Increment/Decrement 0 0 1 0 0 0 0 1/0 Enable Increment/decrement of the Wiper Counter Wiper Counter Register Register pointed to by P0
Note:
(7) 1/0 = data is one or zero
Figure 4. Three-Byte Instruction Sequence
SCL SDA S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 0 P0 A 0 0 D5 D4 D3 D2 D1 D0 A S T C C C T A K K K O R P T
Figure 5. Increment/Decrement Instruction Sequence
SCL SDA X X S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 0 P0 A I I I D D S T C C N N N E E T A K K C C C C C O R 1 2 n 1 n P T FN8194 Rev 2.00 Page 6 of 20 October 12, 2006