Datasheet LTC2353-18 (Analog Devices) - 5

HerstellerAnalog Devices
BeschreibungBuffered Dual, 18-Bit, 550ksps/Ch Differential ±10.24V ADC with 30VP-P Common Mode Range
Seiten / Seite38 / 5 — DIGITAL INPUTS AND DIGITAL OUTPUTS. The. denotes the specifications which …
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DIGITAL INPUTS AND DIGITAL OUTPUTS. The. denotes the specifications which apply over the

DIGITAL INPUTS AND DIGITAL OUTPUTS The denotes the specifications which apply over the

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LTC2353-18
DIGITAL INPUTS AND DIGITAL OUTPUTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMOS Digital Inputs and Outputs
VIH High Level Input Voltage l 0.8 • OVDD V VIL Low Level Input Voltage l 0.2 • OVDD V IIN Digital Input Current VIN = 0V to OVDD l –10 10 μA CIN Digital Input Capacitance 5 pF VOH High Level Output Voltage IOUT = –500μA l OVDD – 0.2 V VOL Low Level Output Voltage IOUT = 500μA l 0.2 V IOZ Hi-Z Output Leakage Current VOUT = 0V to OVDD l –10 10 μA ISOURCE Output Source Current VOUT = 0V –50 mA ISINK Output Sink Current VOUT = OVDD 50 mA
LVDS Digital Inputs and Outputs
VID Differential Input Voltage l 200 350 600 mV RID On-Chip Input Termination CS = 0V, VICM = 1.2V l 90 106 125 Ω Resistance CS = OVDD 10 MΩ VICM Common-Mode Input Voltage l 0.3 1.2 2.2 V IICM Common-Mode Input Current VIN+ = VIN– = 0V to OVDD l –10 10 μA VOD Differential Output Voltage RL = 100Ω Differential Termination l 275 350 425 mV VOCM Common-Mode Output Voltage RL = 100Ω Differential Termination l 1.1 1.2 1.3 V IOZ Hi-Z Output Leakage Current VOUT = 0V to OVDD l –10 10 μA
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 7.5 38 V VEE Supply Voltage l –16.5 0 V VCC − VEE Supply Voltage Difference l 10 38 V VDD Supply Voltage l 4.75 5.00 5.25 V IVCC Supply Current 550ksps Sample Rate, 2 Channels Enabled (Note 17) l 3.2 3.9 mA Acquisition Mode (Note 17) l 4.9 5.9 mA Nap Mode l 0.9 1.1 mA Power Down Mode l 5 15 μA IVEE Supply Current 550ksps Sample Rate, 2 Channels Enabled (Note 17) l –4.1 –3.2 mA Acquisition Mode (Note 17) l –6.1 –4.7 mA Nap Mode l –1.2 –0.8 mA Power Down Mode l –15 –4 μA
CMOS I/O Mode
OVDD Supply Voltage l 1.71 5.25 V IVDD Supply Current 550ksps Sample Rate, 2 Channels Enabled l 12.4 14.0 mA 550ksps Sample Rate, 2 Channels Enabled, VREFBUF = 5V (Note 15) l 11.2 12.7 mA Acquisition Mode l 1.8 2.6 mA Nap Mode l 1.6 2.4 mA Power Down Mode (C-Grade and I-Grade) l 89 300 μA Power Down Mode (H-Grade) l 89 750 µA 235318f For more information www.linear.com/LTC2353-18 5 Document Outline FEATURES APPLICATIONS DESCRIPTION TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS CONVERTER CHARACTERISTICS DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS REFERENCE BUFFER CHARACTERISTICS DIGITAL INPUTS AND DIGITAL OUTPUTS POWER REQUIREMENTS ADC TIMING CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS CONFIGURATION TABLES FUNCTIONAL BLOCK DIAGRAM TIMING DIAGRAM APPLICATIONS INFORMATION BOARD LAYOUT PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS