Datasheet LTC2353-18 (Analog Devices)

LTC2353-18 Buffered Dual, 18-Bit, 550ksps/Ch Differential ±10.24V ADC with 30VP-P Common Mode Range
FEATURES DESCRIPTION
n
Simultaneous Sampling of 2 Buffered Channels
The LTC®2353-18 is an 18-bit, low noise 2-channel n
550ksps per Channel Throughput
simultaneous sampling successive approximation regis- n
500pA/12nA Max Input Leakage at 85°C/125°C
ter (SAR) ADC with buffered differential, wide common n
±3.5LSB INL (Maximum, ±10.24V Range)
mode range picoamp inputs. Operating from a 5V low n
Guaranteed 18-Bit, No Missing Codes
voltage supply, flexible high voltage supplies, and using n
Differential, Wide Common Mode Range Inputs
the internal reference and buffer, both channels of this n
Per-Channel SoftSpan Input Ranges:
SoftSpanTM ADC can be independently configured on a n
±10.24V, 0V to 10.24V, ±5.12V, 0V to 5.12V
conversion-by-conversion basis to accept ±10.24V, 0V n
±12.5V, 0V to 12.5V, ±6.25V, 0V to 6.25V
to 10.24V, ±5.12V, or 0V to 5.12V signals. One channel n
96.4dB Single-Conversion SNR (Typical)
may also be disabled to increase throughput on the other n
−110dB THD (Typical) at fIN = 2kHz
channel. n
124dB CMRR (Typical) at fIN = 200Hz
The integrated picoamp-input analog buffers, wide n
Rail-to-Rail Input Overdrive Tolerance
input common mode range and 124dB CMRR of the n Integrated Reference and Buffer (4.096V) LTC2353-18 al ow the ADC to directly digitize a variety n SPI CMOS (1.8V to 5V) and LVDS Serial I/O of signals using minimal board space and power. This n Internal Conversion Clock, No Cycle Latency input signal flexibility, combined with ±3.5LSB INL, no n 162mW Power Dissipation (Typical) missing codes at 18 bits, and 96.4dB SNR, makes the n 48-Lead (7mm x 7mm) LQFP Package LTC2353-18 an ideal choice for many high voltage appli- cations requiring wide dynamic range.
APPLICATIONS
The LTC2353-18 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces. Either one or two lanes n Programmable Logic Controllers of data output may be employed in CMOS mode, allowing n Industrial Process Control the user to optimize bus width and throughput. n Power Line Monitoring All registered trademarks and trademarks are the property of their respective owners. Protected n Test and Measurement by U.S. Patents, including 7705765, 7961132, 8319673, 9197235.
TYPICAL APPLICATION
15V 5V 1.8V TO 5V 0.1µF 0.1µF 2.2µF 0.1µF
Integral Nonlinearity vs
CMOS OR LVDS
Output Code and Channel
I/O INTERFACE 2.0 FULLY VCC VDD VDDLBYP OVDD LVDS/CMOS ±10.24V RANGE ARBITRARY DIFFERENTIAL BUFFERS PD TRUE BIPOLAR DRIVE (IN– = 0V) 1.5 +10V +5V ALL CHANNELS IN0+ S/H LTC2353-18 1.0 0V 0V IN0– 0.5 –10V –5V SDO0 18-BIT 0 MUX SDO1 TRUE BIPOLAR UNIPOLAR SAR ADC SCKO +10V +10V –0.5 SCKI INL ERROR (LSB) SDI 0V 0V –1.0 IN1+ CS S/H IN1– BUSY –10V –10V SAMPLE –1.5 CNV CLOCK DIFFERENTIAL INPUTS IN+/IN– WITH VEE REFBUF REFIN GND –2.0 WIDE INPUT COMMON MODE RANGE 235318 TA01a –131072 –65536 0 65536 131072 TWO BUFFERED 47µF 0.1µF 0.1µF OUTPUT CODE 235318 TA01b SIMULTANEOUS SAMPLING CHANNELS –15V 235318f For more information www.linear.com/LTC2353-18 1 Document Outline FEATURES APPLICATIONS DESCRIPTION TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS CONVERTER CHARACTERISTICS DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS REFERENCE BUFFER CHARACTERISTICS DIGITAL INPUTS AND DIGITAL OUTPUTS POWER REQUIREMENTS ADC TIMING CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS CONFIGURATION TABLES FUNCTIONAL BLOCK DIAGRAM TIMING DIAGRAM APPLICATIONS INFORMATION BOARD LAYOUT PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS