Datasheet AD5750, AD5750-1, AD5750-2 (Analog Devices) - 2
| Hersteller | Analog Devices |
| Beschreibung | Industrial Current/Voltage Output Driver with Programmable Ranges |
| Seiten / Seite | 36 / 2 — AD5750/AD5750-1/AD5750-2. Data Sheet. TABLE OF CONTENTS. REVISION … |
| Revision | F |
| Dateiformat / Größe | PDF / 831 Kb |
| Dokumentensprache | Englisch |
AD5750/AD5750-1/AD5750-2. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 9/14—Rev. E to Rev. F. 7/10—Rev. B to Rev. C
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AD5750/AD5750-1/AD5750-2 Data Sheet TABLE OF CONTENTS
Features .. 1 OUTEN .. 26 Applications ... 1 Software Control .. 26 General Description ... 1 Hardware Control .. 28 Revision History ... 2 Transfer Function ... 28 Functional Block Diagram .. 3 Detailed Description of Features .. 29 Specifications ... 4 Output Fault Alert—Software Mode ... 29 Timing Characteristics .. 8 Output Fault Alert—Hardware Mode ... 29 Absolute Maximum Ratings .. 10 Voltage Output Short-Circuit Protection .. 29 ESD Caution .. 10 Asynchronous Clear (CLEAR) ... 29 Pin Configuration and Function Descriptions ... 11 External Current Setting Resistor .. 30 Typical Performance Characteristics ... 13 Programmable Overrange Modes .. 30 Voltage Output .. 13 Packet Error Checking ... 30 Current Output ... 17 Applications Information .. 31 Terminology .. 22 Transient Voltage Protection .. 31 Theory of Operation .. 23 Thermal Considerations .. 31 Software Mode .. 23 Layout Guidelines... 31 Current Output Architecture .. 25 Galvanically Isolated Interface ... 32 Driving Inductive Loads .. 25 Microprocessor Interfacing ... 32 Power-On State of AD5750/AD5750-1/AD5750-2 ... 25 Outline Dimensions ... 33 Default Registers at Power-On ... 26 Ordering Guide .. 33 Reset Function .. 26
REVISION HISTORY 9/14—Rev. E to Rev. F 7/10—Rev. B to Rev. C
Changes to Accuracy, Internal RSET Parameter, Table 2 ... 6 Added Leakage Current in Voltage Output Characteristics Changes to Table 4 .. 10 Parameter (Table 2) ... 5 Changes to Figure 4 .. 11 Added Leakage Current in Current Output Characteristics Changes to Figure 46 .. 20 Parameter (Table 2) ... 6 Changes to Asynchronous Clear (CLEAR) Section ... 29
6/10—Rev. A to Rev. B
Changes to Thermal Consideration Section ... 31 Updated Outline Dimensions ... 33 Changes to Table 1 ... 1 Changes to Ordering Guide .. 33 Changes to Table 2, Power Requirements .. 7
6/12—Rev. D to Rev. E 8/09—Rev. 0 to Rev. A
Changes to Figure 3 .. 9 Added AD5750-1.. Universal Changes to Status Bit Read Operation Section ... 28 Changes to Features and General Description Sections .. 1 Updated Outline Dimensions ... 33 Changes to Table 2 ... 4 Changes to Theory of Operation Section and Figure 51 .. 23
4/12—Rev. C to Rev. D
Change to Figure 52 and Table 6 Title ... 24 Added AD5750-2 .. Universal Changes to Current Output Architecture Section and Power-On Changes to Table 2 .. 4 State of AD5750/AD5750-1 .. 25 Updated Outline Dimensions ... 33 Changes to Transfer Function Section .. 28 Changes to Ordering Guide .. 33 Changes to Programmable Overrange Modes Section ... 30 Changes to Ordering Guide .. 33
7/09—Revision 0: Initial Version
Rev. F | Page 2 of 36 Document Outline Features Applications General Description Table of Contents Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Voltage Output Current Output Terminology Theory of Operation Software Mode Current Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of AD5750/AD5750-1/AD5750-2 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Status Bit Read Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide
AD5750/AD5750-1/AD5750-2 Data Sheet TABLE OF CONTENTS
Features .. 1 OUTEN .. 26 Applications ... 1 Software Control .. 26 General Description ... 1 Hardware Control .. 28 Revision History ... 2 Transfer Function ... 28 Functional Block Diagram .. 3 Detailed Description of Features .. 29 Specifications ... 4 Output Fault Alert—Software Mode ... 29 Timing Characteristics .. 8 Output Fault Alert—Hardware Mode ... 29 Absolute Maximum Ratings .. 10 Voltage Output Short-Circuit Protection .. 29 ESD Caution .. 10 Asynchronous Clear (CLEAR) ... 29 Pin Configuration and Function Descriptions ... 11 External Current Setting Resistor .. 30 Typical Performance Characteristics ... 13 Programmable Overrange Modes .. 30 Voltage Output .. 13 Packet Error Checking ... 30 Current Output ... 17 Applications Information .. 31 Terminology .. 22 Transient Voltage Protection .. 31 Theory of Operation .. 23 Thermal Considerations .. 31 Software Mode .. 23 Layout Guidelines... 31 Current Output Architecture .. 25 Galvanically Isolated Interface ... 32 Driving Inductive Loads .. 25 Microprocessor Interfacing ... 32 Power-On State of AD5750/AD5750-1/AD5750-2 ... 25 Outline Dimensions ... 33 Default Registers at Power-On ... 26 Ordering Guide .. 33 Reset Function .. 26
REVISION HISTORY 9/14—Rev. E to Rev. F 7/10—Rev. B to Rev. C
Changes to Accuracy, Internal RSET Parameter, Table 2 ... 6 Added Leakage Current in Voltage Output Characteristics Changes to Table 4 .. 10 Parameter (Table 2) ... 5 Changes to Figure 4 .. 11 Added Leakage Current in Current Output Characteristics Changes to Figure 46 .. 20 Parameter (Table 2) ... 6 Changes to Asynchronous Clear (CLEAR) Section ... 29
6/10—Rev. A to Rev. B
Changes to Thermal Consideration Section ... 31 Updated Outline Dimensions ... 33 Changes to Table 1 ... 1 Changes to Ordering Guide .. 33 Changes to Table 2, Power Requirements .. 7
6/12—Rev. D to Rev. E 8/09—Rev. 0 to Rev. A
Changes to Figure 3 .. 9 Added AD5750-1.. Universal Changes to Status Bit Read Operation Section ... 28 Changes to Features and General Description Sections .. 1 Updated Outline Dimensions ... 33 Changes to Table 2 ... 4 Changes to Theory of Operation Section and Figure 51 .. 23
4/12—Rev. C to Rev. D
Change to Figure 52 and Table 6 Title ... 24 Added AD5750-2 .. Universal Changes to Current Output Architecture Section and Power-On Changes to Table 2 .. 4 State of AD5750/AD5750-1 .. 25 Updated Outline Dimensions ... 33 Changes to Transfer Function Section .. 28 Changes to Ordering Guide .. 33 Changes to Programmable Overrange Modes Section ... 30 Changes to Ordering Guide .. 33
7/09—Revision 0: Initial Version
Rev. F | Page 2 of 36 Document Outline Features Applications General Description Table of Contents Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Voltage Output Current Output Terminology Theory of Operation Software Mode Current Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of AD5750/AD5750-1/AD5750-2 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Status Bit Read Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide