Datasheet LTC4309 (Analog Devices)
| Hersteller | Analog Devices |
| Beschreibung | Level Shifting Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery |
| Seiten / Seite | 16 / 1 — FEATURES. DESCRIPTION. Bidirectional Buffer Increases Fanout. 60mV Buffer … |
| Dateiformat / Größe | PDF / 205 Kb |
| Dokumentensprache | Englisch |
FEATURES. DESCRIPTION. Bidirectional Buffer Increases Fanout. 60mV Buffer Offset Independent of Load
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LTC4309 Level Shifting Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery
FEATURES DESCRIPTION
n
Bidirectional Buffer Increases Fanout
The LTC®4309 hot swappable 2-wire bus buffer allows n
60mV Buffer Offset Independent of Load
I/O card insertion into a live backplane without corrup- n
Optional Disconnect when Bus is Stuck Low
tion of the data and clock busses. The LTC4309 provides n
Prevents SDA and SCL Corruption During Live
bidirectional buffering, keeping the backplane and card
Board Insertion and Removal from Backplane
capacitances isolated. Low offset and high VOL tolerance n
Level Shift 2.5V, 3.3V and 5V Busses
allows cascading of multiple devices on the clock and data n
Compatible with Non-Compliant VOL I2C Devices
busses. If SDAOUT or SCLOUT are low for 30ms, FAULT n
±6kV Human Body Model ESD Ruggedness
will pull low indicating a stuck bus low condition. If DISCEN n Isolates Input SDA and SCL Lines from Output is tied high, the LTC4309 will automatically break the bus n Compatible with I2C™, I2C Fast-Mode and SMBus connection and generate up to 16 clock pulses and a stop n READY Open Drain Output bit in an attempt to free the bus. A connection will resume n FAULT Open Drain Output if the stuck bus is cleared. If DISCEN is connected to GND, n 1V Precharge on All SDA and SCL Lines the busses will remain connected with no clock or stop n Optional Rise Time Accelerators bit generation. ACC input enables rise-time accelerators n High Impedance SDA, SCL Pins for VCC = 0 for high capacitively loaded busses. n Available in Small 12-Pin DFN (4mm x 3mm) and During insertion, the SDA and SCL lines are precharged to 16-Lead SSOP Packages 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4309 to connect after a stop
APPLICATIONS
bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY n Live Board Insertion is an open drain output which indicates that the backplane n Servers and card sides are connected. n Capacitance Buffer/Bus Extender n L RAID Systems , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including n ATCA 6356140, 6650174, 7032051.
TYPICAL APPLICATION
3.3V
Rising Edge from Asserted Low
5V 0.01μF 1000 10k 10k V 0.01 CC μF V V V CC2 CC2 CC 800 EN ENABLE ACC ACC 2.7k 2.7k ENABLE LTC4309 100k LTC4309 10k 10k 600 /DIV LOW OFFSET SDAOUT SCL1 SCLIN SCLOUT SCLIN SCLOUT SCL2 200mV 400 SDA1 SDAIN SDAOUT SDAIN SDAOUT SDA2 3.3V 5V SDAIN 3.3V 5V 200 DISCEN 10k DISCEN 10k 0 10k READY 10k READY 0 100 200 300 400 500 600 100ns/DIV FAULT FAULT FAULT FAULT GND GND 4309 G01 BACKPLANE CARD 4309 TA01 CONNECTOR CONNECTOR 4309fa 1
FEATURES DESCRIPTION
n
Bidirectional Buffer Increases Fanout
The LTC®4309 hot swappable 2-wire bus buffer allows n
60mV Buffer Offset Independent of Load
I/O card insertion into a live backplane without corrup- n
Optional Disconnect when Bus is Stuck Low
tion of the data and clock busses. The LTC4309 provides n
Prevents SDA and SCL Corruption During Live
bidirectional buffering, keeping the backplane and card
Board Insertion and Removal from Backplane
capacitances isolated. Low offset and high VOL tolerance n
Level Shift 2.5V, 3.3V and 5V Busses
allows cascading of multiple devices on the clock and data n
Compatible with Non-Compliant VOL I2C Devices
busses. If SDAOUT or SCLOUT are low for 30ms, FAULT n
±6kV Human Body Model ESD Ruggedness
will pull low indicating a stuck bus low condition. If DISCEN n Isolates Input SDA and SCL Lines from Output is tied high, the LTC4309 will automatically break the bus n Compatible with I2C™, I2C Fast-Mode and SMBus connection and generate up to 16 clock pulses and a stop n READY Open Drain Output bit in an attempt to free the bus. A connection will resume n FAULT Open Drain Output if the stuck bus is cleared. If DISCEN is connected to GND, n 1V Precharge on All SDA and SCL Lines the busses will remain connected with no clock or stop n Optional Rise Time Accelerators bit generation. ACC input enables rise-time accelerators n High Impedance SDA, SCL Pins for VCC = 0 for high capacitively loaded busses. n Available in Small 12-Pin DFN (4mm x 3mm) and During insertion, the SDA and SCL lines are precharged to 16-Lead SSOP Packages 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4309 to connect after a stop
APPLICATIONS
bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY n Live Board Insertion is an open drain output which indicates that the backplane n Servers and card sides are connected. n Capacitance Buffer/Bus Extender n L RAID Systems , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including n ATCA 6356140, 6650174, 7032051.
TYPICAL APPLICATION
3.3V
Rising Edge from Asserted Low
5V 0.01μF 1000 10k 10k V 0.01 CC μF V V V CC2 CC2 CC 800 EN ENABLE ACC ACC 2.7k 2.7k ENABLE LTC4309 100k LTC4309 10k 10k 600 /DIV LOW OFFSET SDAOUT SCL1 SCLIN SCLOUT SCLIN SCLOUT SCL2 200mV 400 SDA1 SDAIN SDAOUT SDAIN SDAOUT SDA2 3.3V 5V SDAIN 3.3V 5V 200 DISCEN 10k DISCEN 10k 0 10k READY 10k READY 0 100 200 300 400 500 600 100ns/DIV FAULT FAULT FAULT FAULT GND GND 4309 G01 BACKPLANE CARD 4309 TA01 CONNECTOR CONNECTOR 4309fa 1