Datasheet ATtiny13, ATtiny13V - Summary (Microchip) - 3

HerstellerMicrochip
Beschreibung8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash
Seiten / Seite22 / 3 — ATtiny13. 1.1. Pin Descriptions. 1.1.1. VCC. 1.1.2. GND. 1.1.3. Port B …
RevisionRev. 08-01-2010
Dateiformat / GrößePDF / 574 Kb
DokumentenspracheEnglisch

ATtiny13. 1.1. Pin Descriptions. 1.1.1. VCC. 1.1.2. GND. 1.1.3. Port B (PB5:PB0). 1.1.4. RESET

ATtiny13 1.1 Pin Descriptions 1.1.1 VCC 1.1.2 GND 1.1.3 Port B (PB5:PB0) 1.1.4 RESET

Textversion des Dokuments

ATtiny13 1.1 Pin Descriptions 1.1.1 VCC
Digital supply voltage.
1.1.2 GND
Ground.
1.1.3 Port B (PB5:PB0)
Port B is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATtiny13 as listed on page 54.
1.1.4 RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in Table 18-1 on page 115. Shorter pulses are not guaranteed to generate a reset. The reset pin can also be used as a (weak) I/O pin.
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2535JS–AVR–08/10 Document Outline Features 1. Pin Configurations 1.1 Pin Descriptions 1.1.1 VCC 1.1.2 GND 1.1.3 Port B (PB5:PB0) 1.1.4 RESET 2. Overview 2.1 Block Diagram 3. General Information 3.1 Resources 3.2 Code Examples 3.3 Data Retention 4. Register Summary 5. Instruction Set Summary 6. Ordering Information 7. Packaging Information 7.1 8P3 7.2 8S2 7.3 S8S1 7.4 20M1 7.5 10M1 8. Errata 8.1 ATtiny13 Rev. D 8.2 ATtiny13 Rev. C 8.3 ATtiny13 Rev. B 8.3.1 Wrong values read after Erase Only operation 8.3.2 High Voltage Serial Programming Flash, EEPROM, Fuse and Lock Bits may fail 8.3.3 Device may lock for further programming 8.3.4 debugWIRE communication not blocked by lock-bits 8.3.5 Watchdog Timer Interrupt disabled 8.3.6 EEPROM can not be written below 1.9 Volt 8.4 ATtiny13 Rev. A 9. Datasheet Revision History 9.1 Rev. 2535J-08/10 9.2 Rev. 2535I-05/08 9.3 Rev. 2535H-10/07 9.4 Rev. 2535G-01/07 9.5 Rev. 2535F-04/06 9.6 Rev. 2535E-10/04 9.7 Rev. 2535D-04/04 9.8 Rev. 2535C-02/04 9.9 Rev. 2535B-01/04 9.10 Rev. 2535A-06/03