Datasheet LAPIS Semiconductor MR44V100A — Datenblatt

FEDR44V100A-01
Issue Date: Sep. 04, 2017 MR44V100A
1M Bit(131,072-Word -Word Г— 8-Bit) FeRAM (Ferroelectric Random Access Memory) I2C GENERAL DESCRIPTION
The MR44V100A is a nonvolatile 131,072-word x 8-bit ferroelectric random access memory (FeRAM)
developed in the ferroelectric process and silicon-gate CMOS technology. The MR44V100A is accessed using
Two-wire Serial Interface ( I2C BUS ).Unlike SRAMs, this device, whose cells are nonvolatile, eliminates
battery backup required to hold data. This device has no mechanisms of erasing and programming memory cells
and blocks, such as those used for various EEPROMs. Therefore, the write cycle time can be equal to the read
cycle time and the power consumption during a write can be reduced significantly.
The MR44V100A can be used in various applications, because the device is guaranteed for the write/read
tolerance of 1012 cycles per bit and the rewrite count can be extended significantly. FEATURES 131,072-word Г— 8-bit configuration I2C BUS Interface A single 3.3 V typ. (1.8V to 3.6V) power supply Operating frequency:
3.4MHz(Max) HS-mode
1MHz(Max) F/S-mode Plus Read/write tolerance
1012 cycles/bit Data retention
10 years Guaranteed operating temperature range
-40 to 85В°C Low power consumption
Power supply current (@3.4MHz)
1.1mA(Max.)
Standby mode supply current
10ОјA(Typ.),
50ОјA(Max.)
Sleep mode supply current
0.1ОјA(Typ.), …