Datasheet Texas Instruments CDC2536DBG4 — Datenblatt

HerstellerTexas Instruments
SerieCDC2536
ArtikelnummerCDC2536DBG4
Datasheet Texas Instruments CDC2536DBG4

3,3-V-PLL-Takttreiber mit 1 / 2x-, 1x- und 2x-Frequenzoptionen 28-SSOP

Datenblätter

CDC2536: 3.3-V PLL Clock Driver With 3-State Outputs datasheet
PDF, 446 Kb, Revision: E, Datei veröffentlicht: Jul 9, 2004
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Verpackung

Pin28
Package TypeDB
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY50
CarrierTUBE
Device MarkingCDC2536
Width (mm)5.3
Length (mm)10.2
Thickness (mm)1.95
Pitch (mm).65
Max Height (mm)2
Mechanical DataHerunterladen

Parameter

Absolute Jitter (Peak-to-Peak Cycle or Period Jitter)200 ps
Number of Outputs6
Operating Frequency Range(Max)100 MHz
Operating Frequency Range(Min)25 MHz
Package GroupSSOP
Package Size: mm2:W x L28SSOP: 80 mm2: 7.8 x 10.2(SSOP) PKG
RatingCatalog
VCC3.3 V
t(phase error)500 ps
tsk(o)500 ps

Öko-Plan

RoHSCompliant

Anwendungshinweise

  • Application and Design Considerations for CDC5xx Phase-Lock Loop Clock Drivers
    PDF, 101 Kb, Datei veröffentlicht: Apr 1, 1996
    Today?s high-speed system designs require stringent propagation and skew parameters to maintain desired system performance. TI developed the CDC5XX platform of PLL clock drivers to meet the need for high-performance clock system components. This document describes the features and functions of the CDC5XX and discusses design considerations and configurations for the CDC586, CDC582, and CDC2582 clo

Modellreihe

Herstellerklassifikation

  • Semiconductors > Clock and Timing > Clock Buffers > Zero Delay Buffers