Datasheet Texas Instruments V62/05613-02XE — Datenblatt

HerstellerTexas Instruments
SerieADS5500-EP
ArtikelnummerV62/05613-02XE
Datasheet Texas Instruments V62/05613-02XE

14-Bit-Analog-Digital-Wandler (ADC) mit 125 MSPS - erweitertes Produkt 64-HTQFP -55 bis 125

Datenblätter

ADS5500-EP datasheet
PDF, 939 Kb, Revision: C, Datei veröffentlicht: Sep 2, 2008
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin64
Package TypePAP
Industry STD TermHTQFP
JEDEC CodeS-PQFP-G
Package QTY160
CarrierJEDEC TRAY (10+1)
Device MarkingADS5500MEP
Width (mm)10
Length (mm)10
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataHerunterladen

Parameter

# Input Channels1
Analog Voltage AVDD(Max)3.6 V
Analog Voltage AVDD(Min)3 V
ArchitecturePipeline
Digital Supply(Max)3.6 V
Digital Supply(Min)3 V
ENOB11.3 Bits
INL(Max)8 +/-LSB
InterfaceParallel CMOS
Operating Temperature Range-55 to 125 C
Package GroupHTQFP
Package Size: mm2:W x L64HTQFP: 144 mm2: 12 x 12(HTQFP) PKG
Power Consumption(Typ)780 mW
RatingHiRel Enhanced Product
Reference ModeInt
Resolution14 Bits
SFDR84 dB
SNR71 dB
Sample Rate (max)125MSPS SPS

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • 14-Bit, 125-MSPS ADS5500 Evaluation
    PDF, 738 Kb, Datei veröffentlicht: Jan 18, 2005
  • Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC Dev
    PDF, 627 Kb, Datei veröffentlicht: Jun 25, 2004
    Texas Instruments has introduced a family of devices suited to meet the demand for high-speed, high-IF sampling ADC devices like the ADS5500 ADC, capable of sampling at 125 MSPS. To realize the full potential of these high performance devices, it is imperative to provide an extremely low phase noise clock source. The CDC7005 clock distribution chip offers a real-world clocking solution to meet the
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, Datei veröffentlicht: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, Datei veröffentlicht: Apr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • Clocking High-Speed Data Converters
    PDF, 310 Kb, Datei veröffentlicht: Jan 18, 2005
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Datei veröffentlicht: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.

Modellreihe

Herstellerklassifikation

  • Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters

Andere Namen:

V62/0561302XE, V62/05613 02XE