Datasheet Texas Instruments TPS79325YEQR — Datenblatt

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PDF, 1.2 Mb, Revision: L, Datei veröffentlicht: Aug 7, 2014

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NanoStarв„ў Wafer Chip-Scale Package Design Guide
PDF, 286 Kb, Datei veröffentlicht: Sep 5, 2003
To satisfy market demand for an ultra-small, staggered 5-ball wafer-level chip-scale package, TI has introduced the 170Ојm NanoStar YEQ package. Since staggered ball WCSPs are not registered under the JEDEC MO-211 standard, there are no formal industry-standard guidelines on proper use of devices in this package. This application note gives guidelines for reliable, high-performance use of the YE
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NanoStarв„ў & NanoFreeв„ў 300Ојm Solder Bump WCSP Application
PDF, 749 Kb, Datei veröffentlicht: Feb 2, 2004
The NanoStarв„ў Wafer Chip-Scale Package (WCSP) is a family of bare die packages developed for applications that require the smallest possible package. WCSP provides electrical interconnection via solder spheres attached to the die and is aligned with JEDEC package standard MOв€’211. NanoStarв„ў, with advanced materials engineering technology, has demonstrated excellent board level rel
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Cycloneв„ў III FPGA Starter Kit Power Reference Design
PDF, 314 Kb, Datei veröffentlicht: Mar 27, 2008
This power supply was designed to power the 3C25F324 starter kit. This reference design has many benefits over the existing power supply found on the starter kit demonstration board.

Serie: TPS793 (34)