Datasheet TPS40210, TPS40211 (Texas Instruments) - 4
| Hersteller | Texas Instruments |
| Beschreibung | TPS4021x 4.5-V to 52-V Input Current Mode Boost Controller |
| Seiten / Seite | 52 / 4 — TPS40210,. TPS40211. www.ti.com. 6.2 ESD Ratings. VALUE. UNIT. 6.3 … |
| Revision | F |
| Dateiformat / Größe | PDF / 1.8 Mb |
| Dokumentensprache | Englisch |
TPS40210,. TPS40211. www.ti.com. 6.2 ESD Ratings. VALUE. UNIT. 6.3 Recommended Operating Conditions. MIN. MAX. 6.4 Thermal Information
Modelllinie für dieses Datenblatt
Textversion des Dokuments
TPS40210, TPS40211
SLUS772F – MARCH 2008 – REVISED MARCH 2015
www.ti.com 6.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V(ESD) Electrostatic discharge V Charged-device model (CDM), per JEDEC specification JESD22- ±1500 C101(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions MIN MAX UNIT
VDD Input voltage 4.5 52 V TJ Operating Junction temperature -40 125 °C
6.4 Thermal Information TPS40210 TPS40211 THERMAL METRIC(1) HVSSOP VSON UNIT 10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 67.2 47.2 RθJC(top) Junction-to-case (top) thermal resistance 50.5 74.6 RθJB Junction-to-board thermal resistance 41.0 22.2 °C/W ψJT Junction-to-top characterization parameter 2.4 2.9 ψJB Junction-to-board characterization parameter 40.7 22.4 RθJC(bot) Junction-to-case (bottom) thermal resistance 15.6 8.8 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
TJ = –40°C to 125°C, VDD= 12Vdc, all parameters at zero power dissipation (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOLTAGE REFERENCE
TPS40210 COMP = FB, 4.5 ≤ VDD ≤ 52 V, TJ = 25°C 693 700 707 Feedback voltage range TPS40211 COMP=FB, 4.5 ≤ VDD ≤ 52 V, TJ = 25°C 254 260 266 V COMP = FB, 4.5 ≤ V FB DD ≤ 52 V, -40°C ≤ TJ ≤ mV TPS40210 686 700 714 125°C COMP = FB, 4.5 ≤ V TPS40211 DD ≤ 52 V, -40°C ≤ TJ ≤ 250 260 270 125°C
INPUT SUPPLY
VDD Input voltage range 4.5 52 V 4.5 ≤ VDD ≤ 52 V, no switching, VDIS < 0.8 1.5 2.5 mA IDD Operating current 2.5 ≤ VDIS ≤ 7 V 10 20 μA VDD < VUVLO(on), VDIS < 0.8 530 μA
UNDERVOLTAGE LOCKOUT
VUVLO(on) Turn on threshold voltage 4.00 4.25 4.50 V VUVLO(hyst) UVLO hysteresis 140 195 240 mV
OSCILLATOR
Oscillator frequency range(1) 35 1000 fOSC kHz Oscillator frequency RRC = 182 kΩ, CRC = 330 pF 260 300 340 Frequency line regulation 4.5 ≤ VDD ≤ 52 V -20% 7% VSLP Slope compensation ramp 520 620 720 mV (1) Ensured by design. Not production tested. 4 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: TPS40210 TPS40211 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Soft-Start 7.3.2 BP Regulator 7.3.3 Shutdown (DIS/EN Pin) 7.3.4 Minimum On-Time and Off-Time Considerations 7.3.5 Setting the Oscillator Frequency 7.3.6 Synchronizing the Oscillator 7.3.7 Current Sense and Overcurrent 7.3.8 Current Sense and Sub-Harmonic Instability 7.3.9 Current Sense Filtering 7.3.10 Control Loop Considerations 7.3.11 Gate Drive Circuit 7.3.12 TPS40211 7.4 Device Functional Modes 7.4.1 Operation Near Minimum Input Voltage 7.4.2 Operation With DIS/EN Pin 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 12-V to 24-V Nonsynchronous Boost Regulator 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curves 8.2.2 12-V Input, 700-mA LED Driver, Up to 35-V LED String 8.2.2.1 Design Requirements 8.2.2.2 Detailed Design Procedure 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-Party Products Disclaimer 11.1.2 Related Devices 11.2 Documentation Support 11.2.1 Custom Design with WEBENCH Tools 11.2.2 Receiving Notification of Documentation Updates 11.2.3 References 11.3 Related Links 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information
SLUS772F – MARCH 2008 – REVISED MARCH 2015
www.ti.com 6.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V(ESD) Electrostatic discharge V Charged-device model (CDM), per JEDEC specification JESD22- ±1500 C101(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions MIN MAX UNIT
VDD Input voltage 4.5 52 V TJ Operating Junction temperature -40 125 °C
6.4 Thermal Information TPS40210 TPS40211 THERMAL METRIC(1) HVSSOP VSON UNIT 10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 67.2 47.2 RθJC(top) Junction-to-case (top) thermal resistance 50.5 74.6 RθJB Junction-to-board thermal resistance 41.0 22.2 °C/W ψJT Junction-to-top characterization parameter 2.4 2.9 ψJB Junction-to-board characterization parameter 40.7 22.4 RθJC(bot) Junction-to-case (bottom) thermal resistance 15.6 8.8 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
TJ = –40°C to 125°C, VDD= 12Vdc, all parameters at zero power dissipation (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOLTAGE REFERENCE
TPS40210 COMP = FB, 4.5 ≤ VDD ≤ 52 V, TJ = 25°C 693 700 707 Feedback voltage range TPS40211 COMP=FB, 4.5 ≤ VDD ≤ 52 V, TJ = 25°C 254 260 266 V COMP = FB, 4.5 ≤ V FB DD ≤ 52 V, -40°C ≤ TJ ≤ mV TPS40210 686 700 714 125°C COMP = FB, 4.5 ≤ V TPS40211 DD ≤ 52 V, -40°C ≤ TJ ≤ 250 260 270 125°C
INPUT SUPPLY
VDD Input voltage range 4.5 52 V 4.5 ≤ VDD ≤ 52 V, no switching, VDIS < 0.8 1.5 2.5 mA IDD Operating current 2.5 ≤ VDIS ≤ 7 V 10 20 μA VDD < VUVLO(on), VDIS < 0.8 530 μA
UNDERVOLTAGE LOCKOUT
VUVLO(on) Turn on threshold voltage 4.00 4.25 4.50 V VUVLO(hyst) UVLO hysteresis 140 195 240 mV
OSCILLATOR
Oscillator frequency range(1) 35 1000 fOSC kHz Oscillator frequency RRC = 182 kΩ, CRC = 330 pF 260 300 340 Frequency line regulation 4.5 ≤ VDD ≤ 52 V -20% 7% VSLP Slope compensation ramp 520 620 720 mV (1) Ensured by design. Not production tested. 4 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: TPS40210 TPS40211 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Soft-Start 7.3.2 BP Regulator 7.3.3 Shutdown (DIS/EN Pin) 7.3.4 Minimum On-Time and Off-Time Considerations 7.3.5 Setting the Oscillator Frequency 7.3.6 Synchronizing the Oscillator 7.3.7 Current Sense and Overcurrent 7.3.8 Current Sense and Sub-Harmonic Instability 7.3.9 Current Sense Filtering 7.3.10 Control Loop Considerations 7.3.11 Gate Drive Circuit 7.3.12 TPS40211 7.4 Device Functional Modes 7.4.1 Operation Near Minimum Input Voltage 7.4.2 Operation With DIS/EN Pin 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 12-V to 24-V Nonsynchronous Boost Regulator 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curves 8.2.2 12-V Input, 700-mA LED Driver, Up to 35-V LED String 8.2.2.1 Design Requirements 8.2.2.2 Detailed Design Procedure 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-Party Products Disclaimer 11.1.2 Related Devices 11.2 Documentation Support 11.2.1 Custom Design with WEBENCH Tools 11.2.2 Receiving Notification of Documentation Updates 11.2.3 References 11.3 Related Links 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information