Datasheet LM317 (Texas Instruments) - 7

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SLVS044Z – SEPTEMBER 1997 – REVISED APRIL 2025
6.4 Thermal Information (Legacy Chip) LM317 DCY KCS KCT KTT THERMAL METRIC
(1)
UNIT (SOT-223) (TO-220) (TO-220) (TO-263) 4 PINS 3 PINS 3 PINS 3 PINS
Rθ(JA) Junction-to-ambient thermal resistance 66.8 23.5 37.9 38.0 °C/W RθJC(top) Junction-to-case (top) thermal resistance 43.2 15.9 51.1 36.5 °C/W RθJB Junction-to-board thermal resistance 16.9 7.9 23.2 18.9 °C/W ψJT Junction-to-top characterization parameter 3.6 3.0 13.0 6.9 °C/W ψJB Junction-to-board characterization parameter 16.8 7.8 22.8 17.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance NA 0.1 4.2 1.1 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application note.
6.5 Thermal Information (New Chip) LM317 DCY KTT THERMAL METRIC
(1) (2)
UNIT (SOT-223) (TO-263) 4 PINS 3 PINS
Rθ(JA) Junction-to-ambient thermal resistance 59.6 41.0 °C/W RθJC(top) Junction-to-case (top) thermal resistance 39.3 43.6 °C/W RθJB Junction-to-board thermal resistance 8.4 23.6 °C/W ψJT Junction-to-top characterization parameter 1.8 10.4 °C/W ψJB Junction-to-board characterization parameter 8.3 22.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — 0.9 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application note. (2) When surface-mount packages are used (SOT-223), the junction to ambient thermal resistance is reduced by increasing the PCB copper area that is thermally connected to the package. See the Heat Sink Requirements section for heat sink techniques. Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: LM317 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Device Comparison Table 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information (Legacy Chip) 6.5 Thermal Information (New Chip) 6.6 Electrical Characteristics 6.7 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 NPN Darlington Output Drive 7.3.2 Overload Block 7.3.3 Programmable Feedback 7.4 Device Functional Modes 7.4.1 Normal Operation 7.4.2 Operation With Low Input Voltage 7.4.3 Operation at Light Loads 7.4.4 Operation In Self Protection 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.3 Application Curves 8.3 System Examples 8.3.1 0V to 30V Regulator Circuit 8.3.2 Adjustable Regulator Circuit With Improved Ripple Rejection 8.3.3 Precision Current-Limiter Circuit 8.3.4 Tracking Preregulator Circuit 8.3.5 1.25V to 20V Regulator Circuit With Minimum Program Current 8.3.6 Battery-Charger Circuit 8.3.7 50mA, Constant-Current, Battery-Charger Circuit 8.3.8 Slow Turn-On 15V Regulator Circuit 8.3.9 AC Voltage-Regulator Circuit 8.3.10 Current-Limited 6V Charger Circuit 8.3.11 Adjustable 4A Regulator Circuit 8.3.12 High-Current Adjustable Regulator Circuit 8.4 Power Supply Recommendations 8.5 Layout 8.5.1 Layout Guidelines 8.5.1.1 Thermal Considerations 8.5.1.1.1 Heat Sink Requirements 8.5.1.1.2 Heat Sinking Surface-Mount Packages 8.5.1.1.2.1 Heatsinking the SOT-223 (DCY) Package 8.5.1.1.2.2 Heat Sinking the TO-263 (KTT) Package 8.5.2 Layout Examples 9 Device and Documentation Support 9.1 Device Support 9.1.1 Device Nomenclature 9.2 Receiving Notification of Documentation Updates 9.3 Support Resources 9.4 Trademarks 9.5 Electrostatic Discharge Caution 9.6 Glossary 10 Revision History 11 Mechanical, Packaging, and Orderable Information