Datasheet PAM8408 (Diodes) - 10
| Hersteller | Diodes |
| Beschreibung | 3W Stereo Differential Input Class D with Memory Up/Down Volume Control in SO-16L package |
| Seiten / Seite | 13 / 10 — PAM8408. Application Information. PCB Layout Guidelines. Grounding. U N. … |
| Dateiformat / Größe | PDF / 697 Kb |
| Dokumentensprache | Englisch |
PAM8408. Application Information. PCB Layout Guidelines. Grounding. U N. O C. Power Supply Line. A P. – E T E. Figure 3
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PAM8408 Application Information
(continued)
PCB Layout Guidelines Grounding
At this stage it is paramount that we acknowledge the need for separate grounds. Noise currents in the output power stage need to be returned to output noise ground and nowhere else. Were these currents to circulate elsewhere, they may get into the power supply, the signal ground, etc,
D
worse yet, they may form a loop and radiate noise. Any of these instances result in degraded amplifier performance. The logical returns for the
E
output noise currents associated with Class D switching are the respective PGND pins for each channel. The switch state diagram illustrates that
U N
PGND is instrumental in nearly every switch state. This is the perfect point to which the output noise ground trace should return. Also note that
I
output noise ground is channel specific. A two channels amplifier has two mutually exclusive channels and consequently must have two mutually
T
exclusive output noise ground traces. The layout of the PAM8408 offers separate PGND connections for each channel and in some cases each side
N
of the bridge. Output noise grounds must tie to system ground at the power in exclusively. Signal currents for the inputs, reference, etc need to be
O C
returned to quite ground. This ground only ties to the signal components and the GND pin. GND then ties to system ground.
S I Power Supply Line D
As same to the ground, VDD and each channel PVDD need to be separated and tied together at the system power supply. Recommend that al the
T
traces could be routed as short and thick as possible. For the power line layout, just imagine water stream, any barricade placed in the trace (shows
R
in Figure 3) could result in the bad performance of the amplifier.
A P – E T E L O Figure 3 S Components Placement B
The power supply decoupling capacitors need to be placed as close to VDD pins as possible. The inputs need to be routed away from the noisy
O
trace. PAM8408 10 of 13 September 2025 Document number: DS36992 Rev. 2 - 4
www.diodes.com
© 2025 Copyright Diodes Incorporated. All Rights Reserved.
(continued)
PCB Layout Guidelines Grounding
At this stage it is paramount that we acknowledge the need for separate grounds. Noise currents in the output power stage need to be returned to output noise ground and nowhere else. Were these currents to circulate elsewhere, they may get into the power supply, the signal ground, etc,
D
worse yet, they may form a loop and radiate noise. Any of these instances result in degraded amplifier performance. The logical returns for the
E
output noise currents associated with Class D switching are the respective PGND pins for each channel. The switch state diagram illustrates that
U N
PGND is instrumental in nearly every switch state. This is the perfect point to which the output noise ground trace should return. Also note that
I
output noise ground is channel specific. A two channels amplifier has two mutually exclusive channels and consequently must have two mutually
T
exclusive output noise ground traces. The layout of the PAM8408 offers separate PGND connections for each channel and in some cases each side
N
of the bridge. Output noise grounds must tie to system ground at the power in exclusively. Signal currents for the inputs, reference, etc need to be
O C
returned to quite ground. This ground only ties to the signal components and the GND pin. GND then ties to system ground.
S I Power Supply Line D
As same to the ground, VDD and each channel PVDD need to be separated and tied together at the system power supply. Recommend that al the
T
traces could be routed as short and thick as possible. For the power line layout, just imagine water stream, any barricade placed in the trace (shows
R
in Figure 3) could result in the bad performance of the amplifier.
A P – E T E L O Figure 3 S Components Placement B
The power supply decoupling capacitors need to be placed as close to VDD pins as possible. The inputs need to be routed away from the noisy
O
trace. PAM8408 10 of 13 September 2025 Document number: DS36992 Rev. 2 - 4
www.diodes.com
© 2025 Copyright Diodes Incorporated. All Rights Reserved.