Datasheet SX1280, SX1281 (Semtech) - 3

link to page 158
Version ECO Date Changes and/or Modifications (Continued)
The following specifications have been changed: • The 3rd order input intercept for maximum low power gain setting (IIP3) - at 6 MHz offset, has been changed from -6 dBm to -12 dBm - at 10 and 20 MHz offset, has been improved from -6 dBm to 0 dBm • IDDSTDBYRC has been improved from 760 μA to 700 μA • IDDSTDBYXOSC has been improved from 1.2 mA to 1 mA • PHN 10 MHz has been improved from -133 dBc/Hz to -135 dBc/Hz • TS_OS has been improved from 100 μs to 40 μs • RFSHS_L , SF7, BW = 1625 kHz, has been changed from -109 dBm to -108 dBm The switching times have been modified for the following transitions: Rev 2.2 041738 May 2018 • SLEEP to STDBY_RC from 1700 μs to 1200 μs • SLEEP to STDBY_RC from 250 μs to 130 μs • STDBY_RC to STDBY_XOSC from 53 μs to 40 μs • STDBY_RC to FS from 83 μs to 55 μs • STDBY_RC to Rx from 115 μs to 85 μs • STDBY_RC to Tx from 102 μs to 80 μs • STDBY_XOSC to FS from 40 μs to 54 μs Table 6-2 now gives the raw data rates when using LoRa® Formulas of time-on-air for long interleaving in LoRa® mode have been updated in chapter 7.4.4 SX1282 Added to the product family together with descriptions of its Advanced Ranging functionality. Improved description and detail of register retention in the Sleep Mode description of Section 11.5 FSK Mode enhanced Synch word description and graphics in Section 7 and Rev 3.0 Section 11, Tx mode now described in full. 047476 July 2019 Reference to long interleaving removed from ranging section. Internal Release Detailed description of SPI bus sharing without false detection as UART interface. Correction of maximum FLRC Bandwidth to 1.2 MHz. Correction of FLRC sensitivity specification to 1.2 MHz value.
SX1280/SX1281
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3 of 158 Data Sheet Rev 3.2 Semtech DS.SX1280-1.W.APP March 2020
Document Outline Table of Contents List of Figures List of Tables 1. Introduction 1.1 Analog Front End 1.2 Power Distribution 1.3 Modem 1.4 Packet Processing 1.5 Digital Interface and Control 2. Pin Connections 2.1 Transceiver Pinout 2.2 Package view 3. Specifications 3.1 ESD Notice 3.2 Absolute Minimum and Maximum Ratings 3.3 Operating Range 3.4 General Electrical Specifications 3.5 Receiver Electrical Specifications 3.5.1 Receiver Specifications 3.5.2 LoRa® Modem 3.5.3 FLRC Modem 3.5.4 FSK Modem 3.6 Transmitter Electrical Specifications 3.7 Crystal Oscillator Specifications 3.8 Digital Pin Levels 4. Analog Front End 4.1 Transmitter 4.2 Receiver 4.2.1 Low Power Mode and High Sensitivity Mode 4.2.2 Image Frequency 4.2.3 Wi-Fi and Bluetooth Immunity 4.3 PLL 4.4 RC Oscillators 5. Power Distribution 5.1 Selecting DC-DC Converter or LDO Regulation 5.2 Flexible DIO Supply 6. Digital Baseband 6.1 Overview 6.2 LoRa® Modem 6.2.1 LoRa® Modulation 6.2.2 Spreading Factor 6.2.3 Bandwidth 6.2.4 Forward Error Correction Coding Rate 6.2.5 Ranging Engine 6.2.6 Advanced Ranging 6.2.7 Frequency Error 6.3 FLRC Modem 6.3.1 Modem Bandwidth and Data Rates 6.3.2 FEC Coding Rate 6.3.3 Gaussian Filtering 6.4 FSK Modem 6.4.1 Modem Bandwidth and Data Rates 6.4.2 Modem Modulation Index 6.5 Guidance on Modem Selection 7. Packet Engine 7.1 GFSK Packet 7.1.1 Fixed-length Packet Format 7.1.2 Variable-length Packet Format 7.2 BLE Packet Format 7.3 FLRC Packet 7.3.1 FLRC Packet Format 7.3.2 Fixed-Length Packet Format 7.3.3 Variable-length Packet Format 7.3.4 FLRC Time-on-Air 7.4 LoRa® Packet 7.4.1 LoRa® Packet Format 7.4.2 Explicit (Variable-length) Header Mode 7.4.3 Implicit (Fixed-length) Header Mode 7.4.4 LoRa® Time-on-Air 7.5 LoRa® Ranging Engine Packet 7.5.1 Ranging Packet Format 7.5.2 Ranging Master Exchange 7.5.3 Ranging Slave Exchange 7.5.4 Total Exchange Duration 7.5.5 Measurement 8. Data Buffer 8.1 Principle of Operation 8.2 Receive Operation 8.3 Transmit Operation 8.4 Using the Data buffer 9. Digital Interface and Control 9.1 BUSY Pin Communication 9.2 Interface Detection 9.3 SPI Interface 9.3.1 SPI Timing 9.3.2 SPI Timing When the Transceiver is in Active Mode 9.3.3 SPI Timing When the Transceiver Leaves Sleep Mode 9.4 UART Interface 9.4.1 Default UART Settings 9.4.2 Setting the UART Speed 9.5 Pin Sharing 9.6 Multi-Purpose Digital Input/Output (DIO) 9.7 Transceiver Initialization on a Shared SPI Bus 10. Operational Modes 10.1 Startup 10.2 Sleep Mode 10.3 Standby Mode 10.4 Frequency Synthesis (FS) Mode 10.5 Receive (Rx) Mode 10.6 Transmit (Tx) Mode 10.7 Transceiver Circuit Modes Graphical Illustration 10.8 Active Mode Switching Time 11. Host Controller Interface 11.1 Command Structure 11.2 SetUartSpeed Command 11.3 GetStatus Command 11.4 Register Access Operations 11.4.1 WriteRegister Command 11.4.2 ReadRegister Command 11.5 Data Buffer Operations 11.5.1 WriteBuffer Command 11.5.2 ReadBuffer 11.6 Radio Operation Modes 11.6.1 SetSleep 11.6.2 SetStandby 11.6.3 SetFs 11.6.4 SetTx 11.6.5 SetRx 11.6.6 SetRxDutyCycle 11.6.7 SetLongPreamble 11.6.8 SetCAD 11.6.9 SetTxContinuousWave 11.6.10 SetTxContinuousPreamble 11.6.11 SetAutoTx 11.6.12 SetAutoFs 11.7 Radio Configuration 11.7.1 SetPacketType 11.7.2 GetPacketType 11.7.3 SetRfFrequency 11.7.4 SetTxParams 11.7.5 SetCadParams 11.7.6 SetBufferBaseAddress 11.7.7 SetModulationParams 11.7.8 SetPacketParams 11.8 Communication Status Information 11.8.1 GetRxBufferStatus 11.8.2 GetPacketStatus 11.8.3 GetRssiInst 11.9 IRQ Handling 11.9.1 SetDioIrqParams 11.9.2 GetIrqStatus 11.9.3 ClearIrqStatus 12. List of Commands 13. Register Map 14. Transceiver Operation 14.1 GFSK Operation 14.1.1 Common Transceiver Settings 14.1.2 Tx Setting and Operations 14.1.3 Rx Setting and Operations 14.2 BLE Operation 14.2.1 Common Transceiver Settings 14.2.2 Tx Setting and Operations 14.2.3 Rx Setting and Operations 14.2.4 BLE Specific Functions 14.3 FLRC Operation 14.3.1 Common Transceiver Settings 14.3.2 Tx Setting and Operations 14.3.3 Rx Setting and Operations 14.4 LoRa® Operation 14.4.1 Common Transceiver Settings for LoRa® 14.4.2 Tx Setting and Operations 14.4.3 Rx Setting and Operations 14.5 Ranging Operation 14.5.1 Ranging Device Setting 14.5.2 Ranging Operation as State Machines 14.5.3 Ranging RSSI 14.6 Advanced Ranging 14.6.1 Advanced Ranging Mode Operation 14.6.2 Advanced Ranging State Machine 14.7 Miscellaneous Functions 14.7.1 SetRegulatorMode Command 14.7.2 Context Saving 15. Reference Design and Application Schematics 15.1 Reference Design 15.1.1 Application Design Schematic 15.1.2 Reference Design BOM 15.1.3 Reference Design PCB 15.2 Application Design with optional TCXO 15.3 Application Design with Low Drop Out Regulator 15.4 Sleep Mode Consumption 16. Errata 16.1 All Modems: Continuous Receive Mode in Congested Traffic 16.1.1 Problem Description 16.1.2 Problem Solution 16.2 LoRa Modem: Additional Header Checks Required 16.2.1 Problem Description 16.2.2 Problem Solution 16.3 All Modems: Interrupt with Bad CRC 16.3.1 Problem Description 16.3.2 Problem Solution 16.4 FLRC Modem: Increased PER in FLRC Packets with Synch Word 16.4.1 Problem Description 16.4.2 Problem Solution 17. Packaging Information 17.1 Package Outline Drawing 17.2 Package Marking 17.3 Land Pattern 17.4 Reflow Profiles 17.5 Thermal Impedance 17.6 Tape and Reel Specification Glossary