Datasheet UCC34141-Q1 (Texas Instruments) - 8

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UCC34141-Q1
SLUSFP1D – APRIL 2024 – REVISED APRIL 2026
www.ti.com 6.5 Insulation Specifications (continued) PARAMETER TEST CONDITIONS VALUE UNIT
Climatic category 40/125/21
UL 1577 (Planned Certification Target)
VTEST = VISO = 5000VRMS, t = 60s (qualification); VISO Withstand isolation voltage VTEST = 1.2 × VISO = 6000VRMS, t = 1s (100% 5000 VRMS production) (1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these specifications. (2) This coupler is suitable for safe electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. (3) Testing is carried out in air to determine the surge immunity of the package. Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier. (4) Apparent charge is electrical discharge caused by a partial discharge (pd). (5) All pins on each side of the barrier tied together creating a two-terminal device.
6.6 Electrical Characteristics
Over operating temperature range (TJ = –40°C to 150°C), unless otherwise noted. All typical values at TA = 25°C and VVIN = 12V. External BOM components are listed in the pin description table.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT SUPPLY (Primary-side. All voltages with respect to GNDP)
Primary-side input voltage to GNDP. (VDD-COM)=18V; (COM-VEE)=4V; VVIN Input voltage range 5.5(1) 12 20 V PVDD-COM = 0.3W; PCOM-VEE = 0; TA=85oC. Primary-side input voltage to GNDP. (VDD-COM)=18V; (COM-VEE)=4V; VVIN Input voltage range 8(1) 12 18 V PVDD-COM = 1.3W; PCOM-VEE = 0; TA=85oC. IVINQ VIN quiescent current, disabled VENA = 0V; VVIN = 5.5V-20V; 600 µA V VIN operating current, enabled, No ENA = 5V; VVIN = 12V; (VDD-COM) = IVINP_NL 18V, (COM-VEE)=5V, regulating; I 18 mA Load VDD- COM = ICOM-VEE = 0mA. V VIN operating current, enabled, Full ENA = 5V; VVIN = 12V; (VDD-COM) = IVINP_FL 18V, (COM-VEE)=4V, regulating; I 250 mA Load VDD- COM = 83mA; ICOM-VEE =0
UVLOP COMPARATOR (Primary-side. All voltages with respect to GNDP)
VIN analog undervoltage lockout rising Analog Comparator Always Active VVIN_UVLO_R 4 4.25 4.5 V threshold First VIN analog undervoltage lockout Analog Comparator Always Active VVIN_ UVLO_F 3.8 4.04 4.28 V falling threshold First
OVLOP COMPARATOR (Primary-side. All voltages with respect to GNDP)
VIN overvoltage lockout rising VVIN_OVLO_R 21.25 22 22.5 V threshold VIN overvoltage lockout falling VVIN_OVLO_F 19.7 20.3 20.6 V threshold
TSHUTP THERMAL SHUTDOWN COMPARATOR (Primary-side. All voltages with respect to GNDP)
Primary-side over-temperature TSHUT_P_R 150 165 °C shutdown rising threshold Primary-side over-temperature TSHUT_P_HYST 10 20 °C shutdown hysteresis
ENA INPUT PIN (Primary-side. All voltages with respect to GNDP)
8 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: UCC34141-Q1 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Device Comparison 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Insulation Specifications 6.6 Electrical Characteristics 6.7 Safety Limiting Values 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Power Stage Operation 7.3.1.1 VDD-COM Voltage Regulation 7.3.1.2 COM-VEE Voltage Regulation 7.3.1.3 COM-VEE Output Capability 7.3.2 Output Voltage Soft Start 7.3.3 ENA and Power-Good 7.3.4 Protection Functions 7.3.4.1 Input Undervoltage Lockout 7.3.4.2 Input Overvoltage Lockout 7.3.4.3 Output Undervoltage Protection 7.3.4.4 Output Overvoltage Protection 7.3.4.5 Output Short Circuit Protection 7.3.4.6 Over-Temperature Protection 7.3.4.7 BSW Pin Faults Protection 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.2.1 VDD-COM Voltage Regulation 8.2.2.2 COM-VEE Voltage Regulation and Single Output Configuration 8.3 System Examples 8.4 Power Supply Recommendations 8.5 Layout 8.5.1 Layout Guidelines 8.5.2 Layout Example 9 Device and Documentation Support 9.1 Third-Party Products Disclaimer 9.2 Documentation Support 9.2.1 Related Documentation 9.3 Receiving Notification of Documentation Updates 9.4 Support Resources 9.5 Trademarks 9.6 Electrostatic Discharge Caution 9.7 Glossary 10 Revision History 11 Mechanical, Packaging, and Orderable Information