Datasheet LTC7893 (Analog Devices) - 8

HerstellerAnalog Devices
Beschreibung100V Low IQ, Synchronous Boost Controller for GaN FETs in 28-Lead QFN (4mm x 5mm, Plastic Side Wettable) package
Seiten / Seite48 / 8 — Data Sheet. LTC7893. ABSOLUTE MAXIMUM RATINGS. Table 2. Absolute Maximum …
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Data Sheet. LTC7893. ABSOLUTE MAXIMUM RATINGS. Table 2. Absolute Maximum Ratings. PARAMETER. RATING. analog.com

Data Sheet LTC7893 ABSOLUTE MAXIMUM RATINGS Table 2 Absolute Maximum Ratings PARAMETER RATING analog.com

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Data Sheet LTC7893 ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise specified.
Table 2. Absolute Maximum Ratings PARAMETER RATING
Bias Input Supply (VBIAS) -0.3V to 100V RUN -0.3V to 100V BOOST -0.3V to 106V SW -5V to 100V BOOST to SW -0.3V to 6V TGUP, TGDN
1
Not applicable BGUP, BGDN
1
Not applicable EXTVCC -0.3V to 30V DRVCC, INTVCC, BSTVCC -0.3V to 6V VFB -0.3V to 65V PLLIN/SPREAD, FREQ -0.3V to 6V SS -0.3V to 6V ITH -0.3V to 6V DRVSET, DRVUV -0.3V to 6V MODE, ILIM, VPRG -0.3V to 6V PGOOD -0.3V to 6V DTCA, DTCB -0.3V to 6V SENSE+, SENSE– -0.3V to 65V SENSE+ to SENSE– Continuous -0.3V to +0.3V SENSE+ to SENSE– <1ms -100mA to 100mA Operating Junction Temperature Range
2
-40°C to 125°C Storage Temperature Range -65°C to 150°C .1 Do not apply a voltage or current source to these pins. They must be connected to capacitive loads only. Otherwise, permanent damage may occur. 2 The LTC7893 is specified over the –40°C to 125°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Note the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with the board layout, rated package thermal impedance, and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the following formula: TJ = TA + (PD × θJA), where θJA is the package thermal impedance and equals 43°C/W for the 28-lead (4mm × 5mm), side wettable, quad flat no lead (QFN) package.
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Rev. 0 8 of 48 Document Outline Features Applications General Description Typical Application TABLE OF CONTENTS Revision History Specifications Absolute Maximum Ratings Pin Configurations and Function Descriptions Typical Performance Characteristics Functional diagram Theory of Operation Main Control Loop Power and Bias Supplies (VBIAS, EXTVCC, DRVCC, and INTVCC) High-Side Bootstrap Capacitor Dead Time Control (DTCA and DTCB Pins) Startup and Shutdown (RUN and SS Pins) Light Load Operation: Burst Mode Operation, Pulse-Skipping, or Forced Continuous Mode (MODE Pin) Frequency Selection, Spread Spectrum, and Phase-Locked Loop (FREQ and PLLIN/SPREAD Pins) Output Overvoltage Protection Power Good Applications Information Inductor Value Calculation Inductor Core Selection Current Sense Selection Low Value Resistor Current Sensing Inductor DCR Current Sensing Setting the Operating Frequency Selecting the Light-Load Operating Mode Dead Time Control (DTCA and DTCB Pins) DTCx Pin Tied to Ground (Adaptive Dead Time Control) DTCx Pin connected with a resistor to GND Power FET Selection CIN and COUT Selection Setting the Output Voltage RUN Pin and Undervoltage Lockout Soft-Start (SS Pin) INTVCC Regulators (OPTI-DRIVE) Topside FET Driver Supply (CB) Minimum On-Time Considerations Fault Conditions: Overtemperature Protection Phase-Locked Loop and Frequency Synchronization Efficiency Considerations Checking Transient Response Design Example PCB Board Layout Checklist PCB Layout Debugging Typical Applications Related Parts Outline Dimensions Ordering Guide