Datasheet SN74LVC1G74 (Texas Instruments)

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SN74LVC1G74
SCES794G – OCTOBER 2009 – REVISED SEPTEMBER 2021
SN74LVC1G74 Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset 1 Features 3 Description
• Available in the Texas Instruments This single positive-edge-triggered D-type flip-flop is NanoFree™ package designed for 1.65-V to 5.5-V VCC operation. • Supports 5-V VCC operation NanoFree™ package technology is a major • Inputs accept voltages to 5.5-V breakthrough in IC packaging concepts, using the die • Supports down translation to VCC as the package. • Maximum tpd of 5.9-ns at 3.3-V • Low power consumption, 10-µA maximum ICC A low level at the preset ( PRE) or clear ( CLR) • ±24-mA output drive at 3.3-V input sets or resets the outputs, regardless of the • Typical VOLP (output ground bounce) levels of the other inputs. When PRE and CLR are < 0.8-V at VCC = 3.3-V, TA = 25°C inactive (high), data at the data (D) input meeting the • Typical VOHV (output VOH undershoot) setup time requirements is transferred to the outputs > 2-V at VCC = 3.3 V, TA = 25°C on the positive-going edge of the clock pulse. Clock • Ioff supports live insertion, partial-power-down triggering occurs at a voltage level and is not related mode, and back-drive protection directly to the rise time of the clock pulse. Following • Latch-up performance exceeds 100 mA per JESD the hold-time interval, data at the D input can be 78, class II changed without affecting the levels at the outputs. • ESD protection exceeds JESD 22 This device is fully specified for partial-power-down – 2000-V human-body model applications using I – 200-V machine model off. The Ioff circuitry disables the outputs, preventing damaging current backflow – 1000-V charged-device model through the device when it is powered down.
2 Applications Device Information
• Servers
PART NUMBER PACKAGE
(1)
BODY SIZE
• LED displays SM8 (8) 2.95 mm × 2.80 mm • Network switch US8 (8) 2.30 mm × 2.00 mm • Telecom infrastructure SN74LVC1G74 X2SON (8) 1.40 mm × 1.00 mm • Motor drivers • I/O expanders UQFN (8) 1.50 mm × 1.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. PRE D Q CLK Q CLR
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Timing Requirements 6.7 Switching Characteristics 6.8 Operating Characteristics 6.9 Typical Characteristics 7 Parameter Measurement Information 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.4 Device Functional Modes 9 Application and Implementation 9.1 Application Information 9.2 Typical Power Button Circuit 9.2.1 Design Requirements 9.2.2 Detailed Design Procedure 9.2.3 Application Curves 10 Power Supply Recommendations 11 Layout 11.1 Layout Guidelines 11.2 Layout Example 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates 12.2 Support Resources 12.3 Trademarks 12.4 Electrostatic Discharge Caution 12.5 Glossary 13 Mechanical, Packaging, and Orderable Information