Datasheet PSMN9R0-30YL (Nexperia) - 8

NXP Semiconductors PSMN9R0-30YL N-channel 30 V 8 mΩ logic level MOSFET in LFPAK
03aa27 2 VDS a ID 1.5 VGS(pl) 1 VGS(th) VGS QGS1 QGS2 0.5 Q Q GS GD QG(tot) 003aaa508 0−60 0 60 120 180 Tj (°C)
Fig 13. Normalized drain-source on-state resistance Fig 14. Gate charge waveform definitions factor as a function of junction temperature
003aac540 003aac543 10 1400 C VGS (pF) C (V) iss 1200 8 1000 VDS = 12 (V) C 6 oss 800 VDS = 19 (V) 600 4 400 Crss 2 200 0 0 0 5 10 15 20 10-1 1 10 102 V Q DS (V) G (nC)
Fig 15. Gate-source voltage as a function of gate Fig 16. Input, output and reverse transfer capacitances charge; typical values as a function of drain-source voltage; typical values
PSMN9R0-30YL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 04 — 9 March 2011 8 of 14
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents