Datasheet AH4930Q (Diodes) - 10

AH4930Q Application Information
(continued)
3.2 Calculation of the Temperature
The AH4930Q also provides the temperature measurement based on a bandgap reference circuit. The temperature value can be found in two registers of register table (register 3H for the MSBs, register 6H for the LSBs). The temperature is a signed value calculated in 2’s complement but it will not provide 8 bit read-out. Examples with 12 bit are as follows.
Table 3 Conversion Table for 12 Bit MSB LSB Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit11 Bit0
-2048 1024 512 256 128 64 32 16 8 4 2 1 e.g. 0 0 0 0 0 1 1 0 1 0 1 0 Example for 12 bit read-out: 0000 0110 1010: 0 + 0 + 0 + 0 + 0 + 64 + 32 + 0 + 8 + 0 + 2 + 0 = 106 LSB Calculation to temperature in degrees Celsius: 106 LSB × 1°C/LSB = 106°C (Binary code is the temperature value)
4 I2C Interface
The AH4930Q uses Inter-Integrated Circuit (I2C) as communication interfaces with the microcontroller. The I2C-compatible two-wire serial interface provides access to the programmable functions and registers on the device. This protocol uses a two- wire interface for bi-directional communications between the devices connected to the bus. The two interface lines are the serial data line (SDA) and the serial clock line (SCL). Every device on the bus is assigned a unique address and acts as either a master or a slave. The AH4930Q can only be a slave in this sensor application.
4.1 I2C Interface Description
The I2C interface has two main functions in the AH4930Q: configuring the sensor and receiving measurement data. Additionally, I2C also handles the interrupt via SCL pin. • The I2C interface requires two pins: – A serial clock (SCL) input pin. The clock is generated by the microcontroller. – A serial data pin (SDA) for in & output (open drain). The microcontroller always initiates and concludes the transaction. • The data transmission order is Most-Significant Bit (MSB) first, Last-Significant Bit (LSB) last. Data bytes start always with the register address 00H. • The interface can be accessed in any power mode, even in power-down mode. • The values of all three axis (Bx, By, Bz) are put in separate registers for I2C read-out. After a power-on reset, these registers will read zero. • Power-on reset initializes registers to default values and UVLO levels which only affects the ADC supply level during a conversion will lead to an ADC cycle resetting only, and the register values will remain as they are. Deep reset levels could result in internal registers corruption and will lead into a full reset to make default values to be reloaded, and a power-on cycle will be executed. • A ful reset can be triggered via I2C by sending the address 0x00 to all slaves (sensors). A two-bit frame counter allows to check if the power unit did not initiate a measurement cycle, or the ADC did not complete a new measurement - which means the frame counter does not get incremented. • An I2C write transaction writing all four write registers requires a start condition, 45 bits transfer and a stop condition. At 400 kbit/s this means approximately 113μs. • An I2C read transaction reading the top seven registers (from register 00h to 06h) requires a start condition, 81 bits transfer and a stop condition. At 400 kbit/s this means approximately 203μs. The interface can be operated in I2C fast mode (400 kBit/sec max) and is up to 1 Mbit/sec in case the electrical setup of the bus can meet the AH4930Q electrical characteristics requirement. The allowed max clock rate above 400kHz has to be defined on demand given a specific electrical setup depending on the parasitic load of the bus line AH4930Q 10 of 23 April 2025 Document number: DS45843 Rev. 2 - 2
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