Datasheet STP4NK50Z, STP4NK50ZFP, STD4NK50Z, STD4NK50Z-1 (STMicroelectronics) - 2

HerstellerSTMicroelectronics
BeschreibungN-CHANNEL 500V -2.4Ω -3A TO-220/TO-220FP/DPAK/IPAK Zener-Protected SuperMESH Power MOSFET
Seiten / Seite13 / 2 — STP4NK50Z - STP4NK50ZFP - STD4NK50Z - STD4NK50Z-1. ABSOLUTE MAXIMUM …
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STP4NK50Z - STP4NK50ZFP - STD4NK50Z - STD4NK50Z-1. ABSOLUTE MAXIMUM RATINGS. Symbol. Parameter. Value. Unit. STD4NK50Z. STP4NK50Z

STP4NK50Z - STP4NK50ZFP - STD4NK50Z - STD4NK50Z-1 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit STD4NK50Z STP4NK50Z

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STP4NK50Z - STP4NK50ZFP - STD4NK50Z - STD4NK50Z-1 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit STD4NK50Z STP4NK50Z STP4NK50ZFP STD4NK50Z-1
VDS Drain-source Voltage (VGS = 0) 500 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 500 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 3 3 (*) 3 (*) A ID Drain Current (continuous) at TC = 100°C 1.9 1.9 (*) 1.9 (*) A IDM () Drain Current (pulsed) 12 12 (*) 12 (*) A PTOT Total Dissipation at TC = 25°C 45 20 45 W Derating Factor 0.36 0.16 0.36 W/°C VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 2800 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns VISO Insulation Withstand Voltage (DC) - 2500 - V Tj Operating Junction Temperature -55 to 150 °C Tstg Storage Temperature () Pulse width limited by safe operating area (1) ISD ≤3 A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed
THERMAL DATA DPAK TO-220 TO-220FP IPAK
Rthj-case Thermal Resistance Junction-case (Max) 2.78 6.25 2.78 °C/W Rthj-amb Thermal Resistance Junction-ambient (Max) 62.5 100 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C
AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive 3 A (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy 120 mJ (starting Tj = 25 °C, ID = IAR, VDD = 50 V)
GATE-SOURCE ZENER DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVGSO Gate-Source Breakdown Igs=± 1mA (Open Drain) 30 V Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 2/13