Datasheet A1321, A1322, A1323 (Allegro) - 2

HerstellerAllegro
BeschreibungRatiometric Linear Hall Effect Sensor ICs for High-Temperature Operation
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A1321, A1322, and A1323. Ratiometric Linear Hall Effect Sensor ICs. for High-Temperature Operation. Features and Benefits

A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor ICs for High-Temperature Operation Features and Benefits

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A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor ICs for High-Temperature Operation Features and Benefits Description
▪ Temperature-stable quiescent output voltage The A132X family of linear Hall-effect sensor ICs are optimized, ▪ Precise recoverability after temperature cycling sensitive, and temperature-stable. These ratiometric Hall-effect ▪ Output voltage proportional to magnetic flux density sensor ICs provide a voltage output that is proportional to the ▪ Ratiometric rail-to-rail output applied magnetic field. The A132X family has a quiescent ▪ Improved sensitivity output voltage that is 50% of the supply voltage and output ▪ 4.5 to 5.5 V operation sensitivity options of 2.5 mV/G, 3.125 mV/G, and 5m V/G. ▪ Immunity to mechanical stress The features of this family of devices are ideal for use in the ▪ Solid-state reliability harsh environments found in automotive and industrial linear ▪ Robust EMC protection and rotary position sensing systems. Each device has a BiCMOS monolithic circuit which integrates a Hall element, improved temperature-compensating circuitry to reduce the intrinsic sensitivity drift of the Hall element,
Packages: 3 pin SOT23W (suffix LH), and
a small-signal high-gain amplifier, and a rail-to-rail low- impedance output stage.
3 pin SIP (suffix UA)
A proprietary dynamic offset cancellation technique, with an internal high-frequency clock, reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability. This technique produces devices that have an extremely stable quiescent output voltage, are immune to mechanical stress, and have precise Continued on the next page… Not to scale
Functional Block Diagram
V+ VCC t ffse on ti r VOUT lla Amp Out mic O Filte nce Ca Dyna Gain Offset 0.1 μF Trim Control GND A1321-DS, Rev. 23