Databrief PIC18-Q71 (Microchip) - 4
| Hersteller | Microchip |
| Beschreibung | PIC18-Q71 Family Product Brief |
| Seiten / Seite | 18 / 4 — PIC18-Q71. Analog Peripherals. Product Brief |
| Dateiformat / Größe | PDF / 249 Kb |
| Dokumentensprache | Englisch |
PIC18-Q71. Analog Peripherals. Product Brief
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PIC18-Q71
• Two UART Modules: – One module (UART1) supports LIN host and client, DMX mode, DALI gear and device protocols – Asynchronous UART, RS-232, RS-485 compatible – Automatic and user timed BREAK period generation – Automatic checksums – Programmable 1, 1.5 and two Stop bits – Wake-up on BREAK reception – DMA compatible • One SPI Module: – Configurable length bytes – Arbitrary length data packets – Transmit-without-receive and receive-without-transmit options – Transfer byte counter – Separate transmit and receive buffers with 2-byte FIFO and DMA capabilities • One I2C Module, SMBus, PMBus™ Compatible: – Supports Standard-mode (100 kHz), Fast-mode (400 kHz) and Fast-mode plus (1 MHz) modes of operation – 7-bit and 10-bit addressing modes with address masking modes – Dedicated address, transmit and receive buffers and DMA capabilities – Bus collision detection with arbitration – Bus time-out detection and handling – I2C, SMBus 2.0 and SMBus 3.0, and 1.8V input level selections – Separate Transmit and Receive Buffers with 2-byte FIFO and DMA capabilities – Multi-Host mode, including self-addressing • 8-Bit Virtual Port Module: – Provides internal ports used to interconnect digital peripherals – Module can form hardware state machines without any external pins • Device I/O Port Features: – 26 I/O pins (PIC18F24/25/26Q71) – 37 I/O pins (PIC18F44/45/46Q71) – 44 I/O pins (PIC18F54/55/56Q71) – Individually programmable I/O direction, open-drain, slew rate and weak pull-up control – Interrupt-on-change on most pins – Three programmable external interrupt pins • Peripheral Pin Select (PPS): – Enables pin mapping of digital I/O
Analog Peripherals
• Differential Analog-to-Digital Converter with Computation and Context Switching: – Up to 43 external channels – Up to 300 KSPS – Differential or single-ended ADC conversion – Automated math functions on input signals: • Averaging, filter calculations, oversampling and threshold comparison – Four Separate Contexts (settings and results) saved and accessible separately – Contexts can be accessed through firmware or DMA – Operates in Sleep – Nine internal analog channels – Hardware Capacitive Voltage Divider (CVD) Support: © 2021 Microchip Technology Inc.
Product Brief
DS40002289A-page 4 Document Outline Introduction PIC18-Q71 Family Types Features Memory Operating Characteristics Power-Saving Functionality Digital Peripherals Analog Peripherals Clocking Structure Programming/Debug Features 1. Packages 2. Pin Diagrams 3. Pin Allocation Tables The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service
• Two UART Modules: – One module (UART1) supports LIN host and client, DMX mode, DALI gear and device protocols – Asynchronous UART, RS-232, RS-485 compatible – Automatic and user timed BREAK period generation – Automatic checksums – Programmable 1, 1.5 and two Stop bits – Wake-up on BREAK reception – DMA compatible • One SPI Module: – Configurable length bytes – Arbitrary length data packets – Transmit-without-receive and receive-without-transmit options – Transfer byte counter – Separate transmit and receive buffers with 2-byte FIFO and DMA capabilities • One I2C Module, SMBus, PMBus™ Compatible: – Supports Standard-mode (100 kHz), Fast-mode (400 kHz) and Fast-mode plus (1 MHz) modes of operation – 7-bit and 10-bit addressing modes with address masking modes – Dedicated address, transmit and receive buffers and DMA capabilities – Bus collision detection with arbitration – Bus time-out detection and handling – I2C, SMBus 2.0 and SMBus 3.0, and 1.8V input level selections – Separate Transmit and Receive Buffers with 2-byte FIFO and DMA capabilities – Multi-Host mode, including self-addressing • 8-Bit Virtual Port Module: – Provides internal ports used to interconnect digital peripherals – Module can form hardware state machines without any external pins • Device I/O Port Features: – 26 I/O pins (PIC18F24/25/26Q71) – 37 I/O pins (PIC18F44/45/46Q71) – 44 I/O pins (PIC18F54/55/56Q71) – Individually programmable I/O direction, open-drain, slew rate and weak pull-up control – Interrupt-on-change on most pins – Three programmable external interrupt pins • Peripheral Pin Select (PPS): – Enables pin mapping of digital I/O
Analog Peripherals
• Differential Analog-to-Digital Converter with Computation and Context Switching: – Up to 43 external channels – Up to 300 KSPS – Differential or single-ended ADC conversion – Automated math functions on input signals: • Averaging, filter calculations, oversampling and threshold comparison – Four Separate Contexts (settings and results) saved and accessible separately – Contexts can be accessed through firmware or DMA – Operates in Sleep – Nine internal analog channels – Hardware Capacitive Voltage Divider (CVD) Support: © 2021 Microchip Technology Inc.
Product Brief
DS40002289A-page 4 Document Outline Introduction PIC18-Q71 Family Types Features Memory Operating Characteristics Power-Saving Functionality Digital Peripherals Analog Peripherals Clocking Structure Programming/Debug Features 1. Packages 2. Pin Diagrams 3. Pin Allocation Tables The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service