Datasheet ADG608, ADG609 (Analog Devices) - 10

HerstellerAnalog Devices
Beschreibung3 V/5 V, 4/8 Channel High Performance Analog Multiplexers
Seiten / Seite12 / 10 — ADG608/ADG609. VDD. 2.4V. ADG608. VOUT. GND. VSS. TERMINOLOGY
RevisionA
Dateiformat / GrößePDF / 165 Kb
DokumentenspracheEnglisch

ADG608/ADG609. VDD. 2.4V. ADG608. VOUT. GND. VSS. TERMINOLOGY

ADG608/ADG609 VDD 2.4V ADG608 VOUT GND VSS TERMINOLOGY

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ADG608/ADG609 V V DD DD VDD A2 VDD S1 A2 A1 EN 2.4V A1 S8 A0 ADG608 VS A0 1k

S1 D ADG608 VOUT RL S2 D VOUT EN 1k

RL S8 GND V 1k

GND V SS SS VS VSS VSS
Test Circuit 9. OFF Isolation Test Circuit 10. Channel-to-Channel Crosstalk
TERMINOLOGY
tOFF (EN) Delay time between the 50% and 90% points VDD Most positive power supply potential. of the digital input and switch “OFF” V condition. SS Most negative power supply potential in dual supplies. In single supply applications, it may tTRANSITION Delay time between the 50% and 90% points be connected to ground. of the digital inputs and the switch “ON” GND Ground (0 V) reference. condition when switching from one address state to another. RON Ohmic resistance between D and S. t ∆ OPEN “OFF” time measured between the 80% RON RON variation due to a change in the analog points of both switches when switching from input voltage with a constant load current. one address state to another. RON Match Difference between the RON of any two VINL Maximum input voltage for logic “0.” channels. VINH Minimum input voltage for logic “1.” IS (OFF) Source leakage current when the switch is off. IINL (IINH) Input current of the digital input. ID (OFF) Drain leakage current when the switch is off. Crosstalk A measure of unwanted signal which is ID, IS (ON) Channel leakage current when the switch is coupled through from one channel to another on. as a result of parasitic capacitance. VD, VS Analog voltage on terminals D, S. Off Isolation A measure of unwanted signal coupling C through an “OFF” channel. S (OFF) Channel input capacitance for “OFF” condition. Charge Injection A measure of the glitch impulse transferred C from the digital input to the analog output D (OFF) Channel output capacitance for “OFF” condition. during switching. C I D, CS (ON) “ON” switch capacitance. DD Positive supply current. C I IN Digital input capacitance. SS Negative supply current. tON (EN) Delay time between the 50% and 90% points of the digital input and switch “ON” condition. –10– REV. A