Datasheet ADG1211, ADG1212, ADG1213 (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | Low Capacitance, Low Charge Injection ±15 V/+12 V iCMOS Quad SPST Switches |
| Seiten / Seite | 16 / 8 — ADG1211/ADG1212/ADG1213. Data Sheet. TERMINOLOGY IDD. CD, CS (On). ISS. … |
| Revision | D |
| Dateiformat / Größe | PDF / 380 Kb |
| Dokumentensprache | Englisch |
ADG1211/ADG1212/ADG1213. Data Sheet. TERMINOLOGY IDD. CD, CS (On). ISS. CIN. VD (VS). tON. RON. RFLAT(ON). tOFF. Charge Injection. IS (Off)
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ADG1211/ADG1212/ADG1213 Data Sheet TERMINOLOGY IDD
to ground. The positive supply current.
CD, CS (On) ISS
The on switch capacitance, measured with reference to ground. The negative supply current.
CIN VD (VS)
The digital input capacitance. The analog voltage on Terminals D and S.
tON RON
The delay between applying the digital control input and the The ohmic resistance between D and S. output switching on. See Figure 23.
RFLAT(ON) tOFF
Flatness is defined as the difference between the maximum and The delay between applying the digital control input and the minimum value of on resistance, as measured over the specified output switching off. See Figure 23. analog signal range.
Charge Injection IS (Off)
A measure of the glitch impulse transferred from the digital The source leakage current with the switch off. input to the analog output during switching.
ID (Off) Off Isolation
The drain leakage current with the switch off. A measure of unwanted signal coupling through an off switch.
ID, IS (On) Crosstalk
The channel leakage current with the switch on. A measure of unwanted signal that is coupled through from one
V
channel to another as a result of parasitic capacitance.
INL
The maximum input voltage for Logic 0.
Bandwidth V
The frequency at which the output is attenuated by 3 dB.
INH
The minimum input voltage for Logic 1.
On Response I
The frequency response of the on switch.
INL (IINH)
The input current of the digital input.
Insertion Loss C
The loss due to the on resistance of the switch.
S (Off )
The off switch source capacitance, measured with reference
THD + N
to ground. The ratio of the harmonic amplitude plus noise of the signal to
C
the fundamental.
D (Off )
The off switch drain capacitance, measured with reference Rev. D | Page 8 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
ADG1211/ADG1212/ADG1213 Data Sheet TERMINOLOGY IDD
to ground. The positive supply current.
CD, CS (On) ISS
The on switch capacitance, measured with reference to ground. The negative supply current.
CIN VD (VS)
The digital input capacitance. The analog voltage on Terminals D and S.
tON RON
The delay between applying the digital control input and the The ohmic resistance between D and S. output switching on. See Figure 23.
RFLAT(ON) tOFF
Flatness is defined as the difference between the maximum and The delay between applying the digital control input and the minimum value of on resistance, as measured over the specified output switching off. See Figure 23. analog signal range.
Charge Injection IS (Off)
A measure of the glitch impulse transferred from the digital The source leakage current with the switch off. input to the analog output during switching.
ID (Off) Off Isolation
The drain leakage current with the switch off. A measure of unwanted signal coupling through an off switch.
ID, IS (On) Crosstalk
The channel leakage current with the switch on. A measure of unwanted signal that is coupled through from one
V
channel to another as a result of parasitic capacitance.
INL
The maximum input voltage for Logic 0.
Bandwidth V
The frequency at which the output is attenuated by 3 dB.
INH
The minimum input voltage for Logic 1.
On Response I
The frequency response of the on switch.
INL (IINH)
The input current of the digital input.
Insertion Loss C
The loss due to the on resistance of the switch.
S (Off )
The off switch source capacitance, measured with reference
THD + N
to ground. The ratio of the harmonic amplitude plus noise of the signal to
C
the fundamental.
D (Off )
The off switch drain capacitance, measured with reference Rev. D | Page 8 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE