Datasheet ADG1438, ADG1439 (Analog Devices)

HerstellerAnalog Devices
BeschreibungSerially Controlled, ±15 V/+12 V/±5 V, 8-Channel/ 4-Channel, iCMOS Multiplexers/Matrix Switches
Seiten / Seite20 / 1 — Serially Controlled, ±15 V/+12 V/±5 V, 8-Channel/. 4-Channel,. CMOS …
RevisionB
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DokumentenspracheEnglisch

Serially Controlled, ±15 V/+12 V/±5 V, 8-Channel/. 4-Channel,. CMOS Multiplexers/Matrix Switches. Data Sheet. ADG1438/. ADG1439

Datasheet ADG1438, ADG1439 Analog Devices, Revision: B

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Serially Controlled, ±15 V/+12 V/±5 V, 8-Channel/ 4-Channel,
i
CMOS Multiplexers/Matrix Switches Data Sheet ADG1438/ ADG1439 FEATURES FUNCTIONAL BLOCK DIAGRAMS Serial interface up to 50 MHz ADG1438 SDO daisy-chaining option 9.5 Ω on resistance at 25°C S1 1.6 Ω on-resistance flatness Fully specified at ±15 V/+12 V/±5 V D 3 V logic-compatible inputs Rail-to-rail operation 20-lead TSSOP and 20-lead, 4 mm × 4 mm LFCSP S8 APPLICATIONS INPUT SHIFT Relay replacement SDO REGISTER Audio and video routing
1
Automatic test equipment
-00
SCLK SYNC DIN RESET
496
Data acquisition systems
08
Temperature measurement systems
Figure 1.
Avionics ADG1439 Battery-powered systems S1A Communication systems DA Medical equipment S4A GENERAL DESCRIPTION
The ADG1438 and ADG1439 are CMOS analog matrix switches
S1B
with a serially controlled 3-wire interface. The ADG1438 is an
DB
8-channel matrix switch, and the ADG1439 is a dual 4-channel
S4B
matrix switch.
INPUT SHIFT SDO REGISTER
The ADG1438/ADG1439 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz and is compatible 2 00 6- with standard SPI, QSPI™, MICROWIRE™, and DSP interface
SCLK SYNC DIN RESET
49 08 standards. The output of the shift register, SDO, enables a number Figure 2. of the ADG1438/ADG1439 devices to be daisy-chained. On
PRODUCT HIGHLIGHTS
power-up, the internal shift register contains all zeros, and all switches are in the off state. 1. 50 MHz serial interface. 2. 9.5 Ω on resistance. Each switch conducts equally well in both directions when on, 3. 1.6 Ω on-resistance flatness. making these devices suitable for both multiplexing and 4. 3 V logic-compatible digital input, VINH = 2.0 V, VINL = 0.8 V. demultiplexing applications. Because each switch is turned on or off by a separate bit, these devices can also be configured as a
Table 1. Related Devices
type of switch array, where any, all, or none of the eight switches
Device No. Description
can be closed at any time. The input signal range extends to the ADG1408/ADG1409 Low on resistance, parallel supply rails. All channels exhibit break-before-make switching interface, 4-/8-channel ±15 V action, preventing momentary shorting when switching channels. multiplexers The ultralow on resistance and on-resistance flatness of these switches make them ideal solutions for data acquisition and gain switching applications where low distortion is critical. iCMOS® construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery- powered instruments.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY 12 V SINGLE SUPPLY ±5 V DUAL SUPPLY CONTINUOUS CURRENT PER CHANNEL TIMING CHARACTERISTICS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION SERIAL INTERFACE INPUT SHIFT REGISTER POWER-ON RESET DAISY-CHAINING OUTLINE DIMENSIONS ORDERING GUIDE