Datasheet ADG5233, ADG5234 (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungHigh Voltage Latch-Up Proof, Triple/Quad SPDT Switches
Seiten / Seite22 / 10 — ADG5233/ADG5234. Data Sheet. PIN CONFIGURATIONS AND FUNCTION …
RevisionD
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DokumentenspracheEnglisch

ADG5233/ADG5234. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. VDD 1. 16 GND. S1A. 15 IN1. 14 EN. D1 1. 12 EN. ADG5233. S1B. 13 V

ADG5233/ADG5234 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 16 GND S1A 15 IN1 14 EN D1 1 12 EN ADG5233 S1B 13 V

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ADG5233/ADG5234 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS A D D 1 D N 1 S V G NI VDD 1 16 GND 6 5 4 3 1 1 1 1 S1A 2 15 IN1 D1 3 14 EN D1 1 12 EN ADG5233 ADG5233 S1B 4 13 V S1B 2 11 V SS TOP VIEW SS TOP VIEW S2B (Not to Scale) 5 12 S3B S2B 3 10 S3B (Not to Scale) D2 6 11 D3 D2 4 9 D3 S2A 7 10 S3A
03 0
5 6 7 8 IN2
9-
8 9 IN3
91
A 2 3 A
09
2 N N 3
4
S I I S
00
NOTES
9-
1. EXPOSED PAD TIED TO SUBSTRATE, V
91
SS.
09 Figure 3. ADG5233 TSSOP Pin Configuration Figure 4. ADG5233 LFCSP_WQ Pin Configuration
Table 8. ADG5233 Pi n Function Descriptions Pin No. TSSOP LFCSP_WQ Mnemonic Description
1 15 VDD Most Positive Power Supply Potential. 2 16 S1A Source Terminal 1A. This pin can be an input or an output. 3 1 D1 Drain Terminal 1. This pin can be an input or an output. 4 2 S1B Source Terminal 1B. This pin can be an input or an output. 5 3 S2B Source Terminal 2B. This pin can be an input or an output. 6 4 D2 Drain Terminal 2. This pin can be an input or an output. 7 5 S2A Source Terminal 2A. This pin can be an input or an output. 8 6 IN2 Logic Control Input 2. 9 7 IN3 Logic Control Input 3. 10 8 S3A Source Terminal 3A. This pin can be an input or an output. 11 9 D3 Drain Terminal 3. This pin can be an input or an output. 12 10 S3B Source Terminal 3B. This pin can be an input or an output. 13 11 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. 14 12 EN Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx logic inputs determine the on switches. 15 13 IN1 Logic Control Input 1. 16 14 GND Ground (0 V) Reference. 17 EPAD The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 9. ADG5233 Truth Table EN INx SxA SxB
1 X1 Off Off 0 0 Off On 0 1 On Off 1 X is don’t care. Rev. D | Page 10 of 22 Document Outline Features Applications Functional Block Diagrams General Description Product Highlights Table of Contents Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx or Dx Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Trench Isolation Applications Information Outline Dimensions Ordering Guide