Datasheet ADG5208-EP, ADG5209-EP (Analog Devices) - 4

HerstellerAnalog Devices
BeschreibungHigh Voltage Latch-Up Proof, 4-/8-Channel Multiplexers
Seiten / Seite20 / 4 — ADG5208-EP/ADG5209-EP. Enhanced Product. Parameter. 25°C. −40°C to +85°C …
RevisionADG5208-EP/ADG5209-EP: Enhanced Data Sheet
Dateiformat / GrößePDF / 424 Kb
DokumentenspracheEnglisch

ADG5208-EP/ADG5209-EP. Enhanced Product. Parameter. 25°C. −40°C to +85°C −55°C to +125°C Unit. Test Conditions/Comments

ADG5208-EP/ADG5209-EP Enhanced Product Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments

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ADG5208-EP/ADG5209-EP Enhanced Product Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
CD (On), CS (On) ADG5208-EP 37 pF typ VS = 0 V, f = 1 MHz ADG5209-EP 21 pF typ VS = 0 V, f = 1 MHz POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V IDD 45 µA typ Digital inputs = 0 V or VDD 55 80 µA max ISS 0.001 µA typ Digital inputs = 0 V or VDD 1 µA max VDD/VSS ±9/±22 V min/V max GND = 0 V 1 Guaranteed by design; not subject to production test.
±20 V DUAL SUPPLY
VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2. Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON 140 Ω typ VS = ±15 V, IS = −1 mA; see Figure 26 160 200 230 Ω max VDD = +18 V, VSS = −18 V On-Resistance Match Between 3.5 Ω typ VS = ±15 V, IS = −1 mA Channels, ∆RON 8 9 10 Ω max On-Resistance Flatness, RFLAT (ON) 34 Ω typ VS = ±15 V, IS = −1 mA 45 55 60 Ω max LEAKAGE CURRENTS VDD = +22 V, VSS = −22 V Source Off Leakage, IS (Off) ±0.005 nA typ VS = ±15 V, VD =  15 V; see Figure 28 ±0.1 ±0.2 ±0.4 nA max Drain Off Leakage, ID (Off) ±0.005 nA typ VS = ±15 V, VD =  15 V; see Figure 28 ±0.1 ±0.4 ±1.4 nA max Channel On Leakage, ID (On), IS (On) ±0.01 nA typ VS = VD = ±15 V; see Figure 25 ±0.2 ±0.5 ±1.4 nA max DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.002 µA typ VIN = VGND or VDD ±0.1 µA max Digital Input Capacitance, CIN 3 pF typ DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 140 ns typ RL = 300 Ω, CL = 35 pF 170 195 220 ns max VS = 10 V; see Figure 31 tON (EN) 120 ns typ RL = 300 Ω, CL = 35 pF 140 170 195 ns max VS = 10 V; see Figure 33 tOFF (EN) 160 ns typ RL = 300 Ω, CL = 35 pF 185 205 220 ns max VS = 10 V; see Figure 33 Break-Before-Make Time Delay, tD 45 ns typ RL = 300 Ω, CL = 35 pF 20 ns min VS1 = VS2 = 10 V; see Figure 32 Charge Injection, QINJ 0.4 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 34 Off Isolation −86 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 Channel-to-Channel Crosstalk −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 Rev. C | Page 4 of 20 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Table of Contents Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx, D, or Dx Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Outline Dimensions Ordering Guide