Datasheet AEM10330 (E-peas) - 5

DATASHEET AEM10330
Source SRC AEM10330 Storage element 100mV - 4.5V • Li-ion cell MAX STO • LiFePO4 cell • Nimh cell • Dual-cell supercapacitor Primary battery PRIM • Single-cell supercapacitor (optional) 1V - 4.5V • Other... MAX LOAD 1.2V/1.8V/2.5V/3.3V 60mA Your circuit Figure 1: Simplified Schematic View
1. Introduction
The AEM10330 is a ful -featured energy efficient power when the AEM10330 enters on PRIMARY BATTERY STATE, and management circuit able to harvest energy from an energy reset when VSTO is above VOVDIS. Status pin ST_LOAD is source (connected to SRC) to supply an application circuit asserted when the load voltage VLOAD rises above VLOAD,TYP, (connected to LOAD) and use any excess of energy to charge and is reset when VLOAD drops below VLOAD,MIN. a storage element (connected to STO). This is done with a The Maximum Power Point (MPP) ratio is configurable thanks minimal bil of material: only capacitors and one inductor are to three configuration pins (R_MPP[2:0]) and ensures an needed for a basic setup. optimum biasing of the harvester to maximize power The heart of the AEM10330 is a regulated switching DCDC extraction. Depending on the harvester, it is possible to adapt converter with high power conversion efficiency. the timings of the MPP evaluations with the two configuration At first start-up, as soon as a required cold start voltage of pins (T_MPP[1:0]) that sets the periodicity and the duration of 275 mV and a sparse amount of power of at least 3 μW is the MPP evaluation. available at the source, the AEM10330 cold starts. After the Once started, if at any time the load requires more power cold start, the AEM extracts the power available from the than can be harvested from the energy source, the AEM10330 source if the working input voltage is at least 100 mV. automatical y uses the storage element to keep the load Through four configuration pins (STO_CFG[3:0]), the user can supplied. select a specific operating mode out of 15 modes that cover The AEM10330’s DCDC converter can work in two modes: most application requirements without any dedicated LOW POWER MODE and HIGH POWER MODE, each one of external component. Those operating modes define the these being optimized for a power range on SRC and LOAD. protection levels of the storage element. If none of those 15 The charging of the storage element can be prevented by modes fit the user’s storage element, a custom mode is also pul ing EN_STO_CH to GND, typical y to protect the storage available to al ow the user to define a mode with custom element if the temperature is too low/high to safely charge it. specifications. The AEM10330 also implements a SLEEP STATE, which Status pins ST_STO, ST_STO_RDY and ST_STO_OVDIS provide reduces the quiescent current to avoid wasting the energy information about the voltage levels of the storage element. stored on the storage element when EN_SLEEP is asserted. ST_STO is asserted when the voltage of the storage element VSTO is above VCHRDY and is reset when the voltage drops At start-up, user can choose to prioritize starting the below VOVDIS. ST_STO_RDY is asserted when VSTO is above application circuit connected on LOAD, or charging the VCHRDY, and reset when VSTO drops below VCHRDY. storage element connected on STO. This is set by the ST_STO_OVDIS is asserted when VSTO drops below VOVDIS or STO_PRIO pin. DS_AEM10330_Rev1.0 Copyright © 2021 e-peas SA 5 Document Outline 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset, Wake Up and Start States 7.2.1. Storage Element Priority Supercapacitor as a Storage Element Battery as a Storage Element 7.2.2. Load Priority 7.3. Supply State 7.4. Shutdown State 7.5. Sleep State 7.6. Primary Battery State 7.7. Maximum Power Point Tracking 7.8. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Load Configuration 8.4. Custom Mode Configuration 8.5. Disable Storage Element Charging 8.6. MPPT Configuration 8.7. ZMPP Configuration 8.8. Source to Storage Element Feed- Through 8.9. Primary Battery Configuration 8.10. External Components 8.10.1. Storage element information 8.10.2. External inductor information 8.10.3. External capacitors information CSRC CINT CLOAD 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 10. Performance Data 10.1. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 10.2. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10.3. DCDC Conversion Efficiency From STO to LOAD in Low Power Mode 10.4. DCDC Conversion Efficiency From STO to LOAD in High Power Mode 10.5. Quiescent Current 11. Schematic 12. Layout 13. Package Information 13.1. Plastic Quad Flatpack No-Lead (QFN 40-pin 5x5mm) 13.2. Board Layout 14. Revision History