Datasheet LTC3337 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | Primary Battery SOH Monitor with Precision Coulomb Counter |
| Seiten / Seite | 24 / 9 — PIN FUNCTIONS (LFCSP) BAT_IN (Pin 11):. SCL (Pin 4):. BAT_OUT (Pin 12):. … |
| Dateiformat / Größe | PDF / 1.4 Mb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS (LFCSP) BAT_IN (Pin 11):. SCL (Pin 4):. BAT_OUT (Pin 12):. SDA (Pin 5):. IPK0 (Pin 10):. IRQ (Pin 6):. IPK1 (Pin 9):
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PIN FUNCTIONS (LFCSP) BAT_IN (Pin 11):
Battery Input Voltage. Connect the bat-
SCL (Pin 4):
Serial Clock Input for the I2C Serial Port. The tery as close as possible to this pin. I2C input levels are scaled with respect to DVCC for I2C
BAT_OUT (Pin 12):
Battery Output Voltage. Connect the compliance. Do not float. load to this pin.
SDA (Pin 5):
Serial Data Input/Output for the I2C Serial
IPK0 (Pin 10):
Input Current Limit Select Bit (with IPK1 Port. The I2C input levels are scaled with respect to DVCC and IPK2). IPK0 should be tied to BAT_IN to select high for I2C compliance. Do not float. or to GND to select low to program the desired IPEAK (see
IRQ (Pin 6):
Interrupt Output. Logic level output refer- Table 1 in the Operation section). Do not float. enced to DVCC. Active low. This pin is normally logic high
IPK1 (Pin 9):
Input Current Limit Select Bit (with IPK0 and but will transition low when either the coulomb counter IPK2). See IPK0. Do not float. alarm level or one of the temperature warning levels is reached.
IPK2 (Pin 8):
Input Current Limit Select Bit (with IPK0 and IPK1). See IPK0. Do not float.
BAL (Pin 1):
Supercapacitor Balance Point. The common node of a stack of two supercapacitors (optional) con-
AVCC (Pin 2):
Supply Rail for the Coulomb Counter and nected to BAT_OUT. A source/sink balancing current of SOH Circuits. AVCC is normally connected to BAT_OUT, up to ±10mA is available. Tie BAL to GND to disable the but in some applications may connect to BAT_IN (see balancer and its associated quiescent current. Applications Information section).
BATOUT_OK (Pin 7):
BATOUT_OK Comparator Output.
DVCC (Pin 3):
Supply Rail for the I2C Serial Bus and for the Logic level output referenced to DVCC. This pin is logic IRQ and BATOUT_OK Outputs. DVCC sets the reference high when the BAT_OUT pin is high and in its normal level of the SDA and SCL pins for I2C compliance. operating range where the coulomb counter is operating The external I2C pull-up resistors on SDA and SCL should properly. connect to DVCC. Depending on the application, DVCC can
GND (Exposed Pad Pin 13):
Ground. The exposed pad be connected to AVCC or to a separate external supply must be soldered to the PCB. between 1.8V and 5.5V. Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Timing Diagram Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Applications Related Parts
PIN FUNCTIONS (LFCSP) BAT_IN (Pin 11):
Battery Input Voltage. Connect the bat-
SCL (Pin 4):
Serial Clock Input for the I2C Serial Port. The tery as close as possible to this pin. I2C input levels are scaled with respect to DVCC for I2C
BAT_OUT (Pin 12):
Battery Output Voltage. Connect the compliance. Do not float. load to this pin.
SDA (Pin 5):
Serial Data Input/Output for the I2C Serial
IPK0 (Pin 10):
Input Current Limit Select Bit (with IPK1 Port. The I2C input levels are scaled with respect to DVCC and IPK2). IPK0 should be tied to BAT_IN to select high for I2C compliance. Do not float. or to GND to select low to program the desired IPEAK (see
IRQ (Pin 6):
Interrupt Output. Logic level output refer- Table 1 in the Operation section). Do not float. enced to DVCC. Active low. This pin is normally logic high
IPK1 (Pin 9):
Input Current Limit Select Bit (with IPK0 and but will transition low when either the coulomb counter IPK2). See IPK0. Do not float. alarm level or one of the temperature warning levels is reached.
IPK2 (Pin 8):
Input Current Limit Select Bit (with IPK0 and IPK1). See IPK0. Do not float.
BAL (Pin 1):
Supercapacitor Balance Point. The common node of a stack of two supercapacitors (optional) con-
AVCC (Pin 2):
Supply Rail for the Coulomb Counter and nected to BAT_OUT. A source/sink balancing current of SOH Circuits. AVCC is normally connected to BAT_OUT, up to ±10mA is available. Tie BAL to GND to disable the but in some applications may connect to BAT_IN (see balancer and its associated quiescent current. Applications Information section).
BATOUT_OK (Pin 7):
BATOUT_OK Comparator Output.
DVCC (Pin 3):
Supply Rail for the I2C Serial Bus and for the Logic level output referenced to DVCC. This pin is logic IRQ and BATOUT_OK Outputs. DVCC sets the reference high when the BAT_OUT pin is high and in its normal level of the SDA and SCL pins for I2C compliance. operating range where the coulomb counter is operating The external I2C pull-up resistors on SDA and SCL should properly. connect to DVCC. Depending on the application, DVCC can
GND (Exposed Pad Pin 13):
Ground. The exposed pad be connected to AVCC or to a separate external supply must be soldered to the PCB. between 1.8V and 5.5V. Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Timing Diagram Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Applications Related Parts