Datasheet ADPA7006 (Analog Devices) - 5

Data Sheet ADPA7006 ABSOLUTE MAXIMUM RATINGS Table 5. THERMAL RESISTANCE Parameter Rating
Thermal performance is directly linked to printed circuit board Drain Bias Voltage (VDDx) 6.0 V (PCB) design and operating environment. Careful attention to Gate Bias Voltage (VGG1) −1.6 V to 0 V PCB thermal design is required. Radio Frequency Input Power (RFIN) 20 dBm θJC is the channel to case thermal resistance, channel to bottom Continuous Power Dissipation (PDISS), T = 7.96 W of the die using die attach epoxy. 85°C (Derate 88.5 mW/°C above 85°C) Temperature
Table 6. Thermal Resistance
Storage Range −55°C to +150°C
Package Type θJC Unit
Operating Range −40°C to +85°C EH-16-11 11.3 °C/W Nominal Junction (T = 85°C, VDD = 5 V, 130.2°C I 1 DQ = 800 mA) θJC is determined by simulation under the fol owing conditions: the heat Junction to Maintain 1,000,0000 Hour 175°C transfer is due solely to thermal conduction from the channel through the ground pin to the PCB. The ground pin is held constant at the operating Mean Time to Failure (MTTF) temperature of 85°C. Peak Reflow (Moisture Sensitivity Level 260°C 3 (MSL3))1
ESD CAUTION
Moisture Sensitivity Level MSL3 Electrostatic Discharge (ESD) Sensitivity Human Body Model (HBM) Class 1B (passed 750 V) Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 5 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 18 GHz TO 24 GHz FREQUENCY RANGE 20 GHz TO 24 GHz FREQUENCY RANGE 24 GHz TO 34 GHz FREQUENCY RANGE 34 GHz TO 44 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS CONSTANT IDD OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION BIASING PROCEDURES BIASING THE ADPA7006 WITH THE HMC980LP4E APPLICATION CIRCUIT SETUP LIMITING VGATE AND VNEG TO MEET ADPA7006 VGG1 ABSOLUTE MAXIMUM RATINGS REQUIREMENT HMC980LP4E BIAS SEQUENCE CONSTANT DRAIN CURRENT BIASING vs. CONSTANT GATE VOLTAGE BIASING OUTLINE DIMENSIONS ORDERING GUIDE